资源列表
pso-vhdl3
- i want verilogHDL and VHDL source coding.please help me-i want verilogHDL and VHDL source coding.please help me...
chap1
- 《VHDL编程实例》一书的范例文件,第一章内容-" VHDL programming examples," a book of sample files, the first chapter
pulse_mo
- 这是一个vhdl的脉冲调制程序，可以调制脉宽、占空比、周期等参数，为学习vhdl的人提供了非常好的参考历程。-This is a pulse modulation vhdl program, can be modulated pulse width, duty cycle, period and other parameters, for people to learn vhdl reference provides a very good course.
txmit
- uart设计，发送模块，无校验位。先输出一个低电平的起始位，然后从低到高输出8个数据位，接着是可选的奇偶校验位（这里没有），最后是高电平的停止位。-uart design, transmit module, no parity. First output of the start bit of a low level, and low to high output 8 data bits, then the optional parity bit (there is no), the last
dual
- This module defines a Synchronous Dual Port Random Access Memory.
ddsforsinandcos
- 利用VerilogHDL调用MATLAB产生的数据实现基于DDS技术的正余弦信号发生器，输出位宽为16。-Using the data generated VerilogHDL call MATLAB implementation is based on DDS technology cosine signal generator, the output is 16 bits wide.
display
- 4 x 7-segment LED driver
led
- 多功能彩灯控制器，VHDL语言编写。调试通过正常。-The multi-function lantern controller, VHDL language. Debugging through the normal.
yj
- 开发板的引进配置文件，对学习开发板如何配置引进有很大的帮助。-The introduction of the configuration file development board, the introduction of a great help in learning how to configure the development board.
bawei
- 4位数据比较器 通过VHDL语言设计出4位数据比较器，了解EDA对数字电路设计的效率和可靠性有极大地提高
pwm
- 用VHDL语言 描述 生成pwm的 IP核-Pwm using VHDL language to describe the generation of IP core
43
- AVR单片机状态机键盘算法4乘3键盘，可以随便移植-AVR microcontroller algorithm state machine keyboard 4 x 3 keypad, you can easily transplant