资源列表
VHDL-Made-Easy
- Intended for both hardware and sofware designers interested in learning VHDL.HDL (Hardware Descr iption Languages) expertise is a critical, distinguishing skill that is essential to a successful career as an electronics designer. With the booming com
FIR_filter
- 基于FPGA实现FIR滤波器功能 使用芯片为EP2C8Q208C8N,实现FIR滤波器的设计，使用Verilog语言编程，本例子有工程文件、仿真、波形，经过测试可以使用。-FIR filter function based on FPGA chip to use EP2C8Q208C8N, achieve FIR filter design using Verilog language programming, the present examples are engineering doc
PAIRCRASH
- 基于ALTERA公司的NIOSII的对对碰游戏的设计-NIOSII based on ALTERA s right right touch of the game design
FPGA
- 主要是fpga学习资料，里面含有fpga设计案例分析和主要程序讲解，是学习和实践的资料。-Mainly fpga learning materials, which contains the fpga design case studies and the main program to explain, is the study and practice of information.
demo_VGAcontroller
- DE2-70 VGACONTROLLER1 FPGA
KEY
- 利用VHDL实现4X4键盘的扫描和译码，并且在数码管显示相应的按键值。-Use VHDL to achieve 4X4 keypad scanning and decoding, and displays the corresponding value in the digital keys.
FPGAexampledesign
- 参加设计大赛时用的FPGA的例程，应该有很大参考价值-Participated in the design competition with the FPGA when the routine, there should be a great reference! ! !
Nios_Clock
- FPGA平台下基于Nios II的数字闹钟的源程序，从DS1302读取时钟数据，在LCD12864上显示出来，按键控制闹钟设定，蜂鸣器闹铃。-Digital clock Nios II source program based on the FPGA platform, clock read data from the DS1302, in the LCD12864 display, keyboard control alarm, buzzer alarm.
T0424_auto_double
- 双核独立cpu分别控制流水灯（使用DE1开发板）(FPGA)-Dual-core independent CPUs control the water lights (using the DE1 development board)(FPGA)
Button3_final
- 本程序用xilinx EDK9.1运行，通过microblaze软核，实现在sparton——3e板卡上的按键及开关的控制，通过RS－232与超级终端进行通信。
PipelinedCPU
- 用Verilog语言实现的流水线CPU设计，大家可以参考一下。-Using Verilog design language of the line CPU, you can reference.
ml984_tnn7_yy475
- imanage processing wavelet de2 denoising fpga