资源列表
excer
- bcd counter code with pdf file for help and better understanding
FPGA-Prototyping-
- Wiley-Interscience - FPGA Prototyping by Verilog Examples - book-Wiley-Interscience- FPGA Prototyping by Verilog Examples- Jun 2008.pdf
Wiley.Interscience.FPGA.Prototyping.By.Verilog.Exa
- fpga之原型参考电子书。国外的经典著作，有很多具体的实例。-Wiley.Interscience.FPGA.Prototyping.By.Verilog.Examples.Jun.2008.eBook-DDU
nios_net716UDP_nic
- 在Altera nios上用rtl8019实现UDP通信-altera nios rtl8019 udp
some-experiment-vhdl
- FPGA 的一些入门实验程序（vhdl），有利于初学者更快地掌握vhdl编程，提高设计能力-Introduction to FPGA some experimental procedures (vhdl), will help beginners to quickly master the vhdl programming, improve design capabilities
DSP_design_flows_in_FPGAs
- Xilinx typical DSP design flow descr iption.
paobiao
- 使用verilog实现跑表计时功能,已经验证过，能够实现功能-Use verilog to achieve run time function
chu_fpga_prototyping_using_verilog_examples_huyho
- interesting book about verilog and fpga with many useful example
Sparten6-CODE-_Verilog
- 基于xilinx 厂商的FPGA硬件的开发源代码，包括UART,SPI,以太网通信-The development of FPGA hardware based on xilinx manufacturers source code, including the UART, SPI, Ethernet communication and so on
100vhdl
- 用vhdl语言学习100例，适合硬件编程的初级学者。-The vhdl language learning 100 cases suitable hardware programming junior scholars.
VLSI-Digital-Signal-Process
- 这是一本介绍超大规模集成电路设计的书籍，相信会有帮助-This is an introductory VLSI design books, I believe will be helpful
EDA
- 数字钟的实现 FPGA上运行 VHDL编写-Digital clock running on the FPGA to achieve the preparation of VHDL