资源列表
zhixinkeji
- 北京至芯科技FPGA的学习资料，从备战Quartus II安装到IIC通信协议，每一章都有Verilog代码并且可以实现仿真程序，非常好用，讲的很详细-Beijing Science and Technology FPGA to the core learning materials, preparing to install Quartus II IIC communication protocol, each chapter Verilog code and can achieve sim
StandardSystem_design
- 基于Avalon总线接口的PWM IP Core 设计 nios ide 环境下可调占空比和周期。-PWM IP Core
PS_PLcommunication
- ZYBO开发板的PS与PL通讯简单实例，PL配置switch和led，PS对switch的输入进行处理并赋值给led，点亮相应的灯。-PS and PL communication simple examples ZYBO development board, PL configuration switch and led, PS to switch inputs are processed and assigned to the led, light the corresponding lig
EDAhandbook
- 集成电路设计中EDA电路设计使用教程，学生用-Integrated circuit design in EDA circuit design using the tutorial,for students
sdram_640X480_full
- 基于FPGA的640*480的sdram项目，使用verilog语言，教学项目教学项目(The SDRAM project of 640*480 based on FPGA, the use of the Verilog language, the teaching project teaching project)
CPLD-code
- CPLD开发板实验代码，包括Verilog和VHDL源代码，原理图-CPLD development board experimental code, including Verilog and VHDL source code, schematics
fftip_1k
- FFT IP核调用 VHDL语言 quartus -FFT IP core VHDL language called quartus
VHDL-Tutorial-in-Sequenctial-Circuits.-
- VHDL Codes for different sequential circuits. Includes Counter, State machines, Addders.
Digital Design Using VHDL - William J. Dally
- Digital Design Using VHDL
FREQ
- 该程序使用verilog编程语言，实现了频率计-The program use verilog programming language, realized the frequency meter
Fundamentals.of.Digital.Logic.with.VHDL-source.ZIP
- <数字逻辑与VHDL设计>代码 作者：STEPHEN BROWN，ZVONKO VRANESIC 边计年译 -《Fundamentals of Digital Logic with VHDL》 [Brown,Vranesic-2005] code Bian Jinian Translation
LAN_TEST12COPY2
- W5500+FPGA NIOS II UDP模式传数据-W5500+FPGA NIOS II UDP u6A21 u5F0F u4F20 u6570 u636E