资源列表
VLSI4
- The mismatch drift of dynamic circuits, which must be corrected by precharging before activation, is a fundamental process and device reliability issue for very large scale integration (VLSI) circuits. In this paper, we report the consequences
multiplier_8bit_top
- 两个8bit无符号整数相乘，模块分为控制模块和数据路径(Two 8bit data multiplies)
DE2_115_CAMERA
- cycloneIV开发板完成图像数据采集，色彩空间转换，SDRAM存取数据，VGA控制等-CycloneIV development board to complete the image data acquisition, color space conversion, SDRAM access to data, VGA control etc
ddr_flash
- 本代码是FPGA控制读写ddrFLASH的源代码。-This code is FPGA control read and write ddrFLASH the source code.
multiprocessor_test
- 基于FPGA的双核处理器实验，相关资料和文档说明-FPGA-based dual-core processor experiments, the relevant information and documentation
cache_test
- instruction cache memory
duozhouqiCPU
- VHDL 多周期CPU设计。基于Quartus II平台-VHDL design of multi-cycle CPU. Quartus II-based platforms
GPIO_PL_IPCORE
- VIVADO 2016.4 通过PS和PL实现GPIO接口的实现方式（3），这是完整工程！-VIVADO 2016.4 u901A u8FC7PS u548CP u5B4E u73B0GPIO u63A5 u53E3 u7684 u5B9E u73B0 u65B9 u5F0F uFF083 uFF09 uFF0C u8FD9 u662F u5B8C u6574 u5DE5 u7A0B uFF01
User_IP
- 如何在 VIVADO 中创建用户自定义的IP(How to create user defined IP in VIVADO)
modelsim-gcc-4.2.1-mingw32vc9
- Necessary file for Modelsim compiler on Windows
Nios_Example_07_SD_35TFT
- 这是一个nios工程，控制TFT液晶屏的程序。FPGA平台用Verilog HDL语言编写的，MCU软核程序有C语言编写。通过这一个完成的工程，你就会明白SOPC的一些实现方法。-This is a nios engineering, control TFT LCD screen program. The FPGA platform Verilog HDL language preparation with the nuclear program has a soft, MCU written
PWM_LED
- 基于DE2_70平台，编写nios软核c代码，控制流水灯，硬件实现验证通过，适合入门-Based DE2_70 platform, written nios soft core c code, control water lights, verified by hardware implementation, suitable for entry