资源列表
1904.Verilog-HDL-by-Samir-Palnitkar
- VLSI book for vhdl and verilogg HDL coding
Verilog_Digital_Design_Synthesis
- Verilog HDL A guide to Digital Design and Synthesis Samir Palnitkar SunSoft Press 1996
ElectronicsVerilog_Digital_Design_Synthesis
- a book which is a guide for verilog beginner
sdram_mdgray1test
- 使用特权EP1C的开发板，实现数码相框加灰度化功能，用verilog编程。-Privileged EP1C development board to achieve digital photo frame features plus gray, with verilog programming.
SDR-SDRM
- 该工程对三星SDR SDRAM（K4S641632）进行读写，工程内部分为PLL以及复位处理模块、写SDRAM逻辑模块、读SDRAM逻辑模块、SDRAM读写封装模块、读写缓存FIFO模块、串口发生模块等-The project of Samsung SDR SDRAM (K4S641632), read and write, internal engineering points for PLL and reset processing module, SDRAM logic module, S
stopwatch
- 基于Verilog的秒表设计，可以在modelsim与开发板环境中正常运行。-A stop watch program based on verilog
FPGA开发全攻略
- FPGA设计攻略及流程，包含时序收敛和引脚约束(FPGA design strategy and process, including time series convergence and pin constraints)
C20_sram_vga.rar
- VGA的FPGA试验工程代码。学习vga的可赶紧下！！！！！！！！！！！,VGA demo
GCD
- synthesis GCD using systemc
20170808_fifo_xc5v_v1.5
- FPGA通过fifo进行数据的载入载出，实现数据的暂时存储和传递(FPGA through fifo data loading and unloading, to achieve temporary storage and delivery of data)
SRAM
- 一个用verilog语言实现的SRAM读写的完整的FPGA工程-A project about sram
VGA_Qin
- VGA实验中，根据要求，动态显示图片，图片的动态效果是触及屏幕反弹 -VGA experiment, according to the requirements, dynamic display picture, dynamic picture of the effect of the screen is touched rebound