资源列表
anti_tr2
- 防抖电路设计,采用计数器内部及时,科以有效防止按键抖动带来的错误操作-camera circuit design, the internal counter using timely, and in the keys to effectively prevent the wrong jitter operation
send_test
- 输入时钟，可以得到周期性的有效信号以及同步信号，同时可以随时钟输出8个字节的数据-Input clock, can be an effective signal, as well as periodic synchronization signal, at the same time can be 8-byte clock output data
trafficled1
- 交通灯控制系统实现控制主干道和支干道的分时通行，有效地解决了十字路口的拥堵，提高了交通运行的效率。-Traffic control system to control the main points and a road traffic, which can effectively solve the intersection congestion, improve the efficiency of the traffic.
ppm
- ppm调制的verilog代码 可实现ppm调制-ppm modulation verilog code ppm modulation
VHDL38decoder
- VHDL 语言实现 38译码器 文件中包括 程序 源代码 还有 testbench 测试程序-38 decoder VHDL language implementation, including program source code file, there are testbench test procedures
MEDIAN.v
- fpga 的 median的verilog实现-median of verilog implementation
32_16div
- 这是一个简单的除法器（32bit/16bit),采用移位相减法-This is a simple divider (32bit/16bit), using phase shift subtraction
chengxu
- 加法器 比较器verilog hdl 等简单小程序 新手学习中 见谅-Adder comparator verilog hdl Adder comparator verilog hdl a small way as simple novice learning apologize
SEND422
- 这是用VHDL编写的代码，是RS422在UART协议层上实现数据发送的过程，很有用的啊！-It is written in VHDL code, is RS422 UART protocol layer in the data transmission process, useful, ah!
Encoder1
- encode of aes arith" it describer how to encode streams and something.. if you want to acknowlegde about-encode of aes arith" it describer how to encode streams and something.. if you want to acknowlegde about
cmi
- 用systemview搭建的cmi编码系统-Cmi built with systemview coding system
AD
- 控制AD7934的信号verilog,控制AD7934的信号verilog-control the ad7934