资源列表
timer
- 本代码用verilog语言描述，在nios上操作，实现了定时器的设置和中断操作，并结合timestamp读取程序运行的时间。-The code to use verilog language to describe, in nios on operation, to achieve the timer settings and interrupt operation, combined with the timestamp reads the program run.
vhdl_design_representation_and_synthesis
- 不错的VHDL的书籍，主要讲综合的。很适合大家阅览。
SDRAM
- 通过配置NOIS软核实现对SDRAM的读写控制-By configuring NOIS soft core to achieve the SDRAM read and write control
Quartus-Tutorial
- Quartus II入门教程 通过一个简单的例子讲解Quartus II的使用方法-Quartus II Tutorial. A simple example to explain the use of the Quartus II
nios2_led_one
- 使用nios2点亮一个led灯，使用软件quartus13.0，开发板de2-115-nios2 led quartus13.0 de2-115
FPGA_Verilog
- 这是《数字信号处理FPGA实现第三版》verilog代码，希望对你们的工程或者学习有帮助。上传只为了学习交流。-This is the " digital signal processing FPGA realization of the third edition of" verilog code, I hope your project or study help. Upload only for learning exchanges.
DE2Project_restored
- 一个完整的设计DE2_project,希望对大家有所帮助，谢谢ok-A complete design DE2_project, everyone would like to be helpful, thank you ok
DIGITAL-SIGNAL-PROCESSING-WITH-FPGA
- 数字信号处理的FPGA实现最新版的源代码，涉及FFT变换、IIR、FIR数字滤波器等的verilog及vhdl代码-<digital signal processing with FPGA> (the latest version) . the source code involving FFT transform, IIR, FIR digital filters by verilog and vhdl.
fftip
- 2008-2009年优秀硕士论文之：基于FPGA的高性能32位浮点FFT IP核的开发-Outstanding Master' s thesis 2008-2009: FPGA-based high-performance 32-bit floating-point FFT IP core development
SmartSopc
- smartsopc 代码 资料 一看就知道不多说了恩,很好很强大-smartsopc code information is not much to see that the ex said, a good strong
wavelet-denoise
- FPGA实现小波阈值降噪的算法说明，有大量的硕士论文，很有参考价值，基于这些资料可以写出源码。-FPGA realization of wavelet threshold noise reduction algorithm descr iption, there are a lot of master s thesis, a good reference, based on these data can be written source.
cooperation
- nios2移植uclinux，并在de2实现，包括quartus下的整个工程以及linux下的image文件。-This file describes how to use nios2 to run linux.