资源列表
contpulso
- A code use for doing a pulse counter in high in ms with output to display, which when pressing a button the count is displayed on the display and when the button is released it stops at a value, but if it is pressed again continue the count. It has a
eetop.cn_spi.tar
- 基于wishbone总线的SPI主设备代码(spi master based on wishbone bus)
ptos
- 八位并行数据转换为串行数据依时钟信号串行输出(Eight bit parallel data to serial data)
Password lock
- 一个 Quartus II 工程,芯片为EP3C55F484C8,是一个简单的保险箱密码锁。包含分频器、键盘去抖、8选1选择器、扬声器模块、动态扫描模块等多个模块。 主要功能: 1. 保险箱上设有密码输入和钥匙锁双重保险。 2. 当密码输入正确后,左边的指示灯亮,此时插入钥匙即可打开保险箱;当密码输入错误后,右边的指示灯亮,发出报警信号,此时需要重新输入密码。 3. 保险箱的密码可根据需要随时更换。(A Quartus II project, the chip is EP3C55F484
Desktop
- 一个简单的8 - 3 编码器,主要适用于初学人员参考,很好的例程。(A simple program means to encoder.)
cordic
- 本代码实现的是利用cordic算法求出已知坐标的角度和幅度(This code implements the angle and amplitude of known coordinates using the CORDIC algorithm.)
counter
- 计数器的实现。可用于各种密码算法中需要的计数器,编译正确,波形正确可直接使用。(Counter implementation. It can be used for counters needed in various cryptographic algorithms, compiled correctly, and the waveforms can be used directly.)
VGA显示贪吃蛇(286116)
- 基于FPGA的贪吃蛇小游戏设计程序源代码和调试方式(FPGA based Snake game design program)
fifo
- fifo模块,改模块使用同步fifo设计,里面包含一些设计技巧,读延迟最少(The module of FIFO is modified by using synchronous FIFO, which contains some design skills and the least latency.)
8815397fft
- 基于MATLAB/FPGA的fft的verilog实现。(Verilog implementation of FFT based on MATLAB/FPGA)
dpram
- 在quartus ii平台上,通过代码实现DPRAM,文件夹中包含仿真文件。(generate DPRAM through verilog)
FPGA实现AD8556采集程序设计
- 基于ADS8556的FPGA数据采集程序设计。(The design of FPGA data acquisition program based on ADS8556.)