资源列表
FPGA乐曲演奏电路
- 乐曲硬件演奏电路设计,采用verilog-VHDL语言编写,使用quartus2开发平台编译仿真(design of music hardware performance circuit(verilogVHDL))
数码管显示
- 在FPGA EGO1的口袋平台上实现数码管滚动显示学号的功能(Rolling on the digital tube to display the school number)
电子时钟
- 基于DE2-115的数字时钟 1.液晶显示,数码管显示 2.整点报时 3.闹钟 4.设置时间 5.设置闹钟(Digital clock based on DE2-115 1. LCD display, digital tube display 2. whole point 3. alarm clock 4. setting time 5. set the alarm clock)
XILINX平台DDR3设计教程
- 从零开始的Xilinx DDR3 控制程序编写教程,利用MIS IP核通过自编逻辑实现对DDR3的读写,强烈推荐(This is a zero to start Xilinx DDR3 control program written tutorial, the use of MIS IP kernel through the self compiled logic to achieve DDR3 reading and writing, strongly recommended.)
《HELLO FPGA》- 软核演练篇
- FPGA实践分析 需要的详细介绍这些方面的知识(FPGA practice analysis requires detailed knowledge of these areas)
OV7670 的SCCB (I2C)波形记录
- i2c(I2C)波形记录详解,帮助理解i2c时序,OV7670 的SCCB (I2C)波形记录.pdf(OV7670 SCCB (I2C).pdf)
NIOS设计从入门到精通
- nios大神进阶,一本非常好的FPGA书籍,从RTL到eclips(nios tech.a very good book learning FPGA tech.)
C51
- 基于5-1单片机环境噪声测量仪的设计,包含主程序、中断服务程序、显示程序、(Based on 51 single-chip environmental noise detector proteus simulation file containing a set of project files noise.dsn Keil main code main.c 6 relevant articles and graduation thesis design through simulation)
counter
- 基于fpga的倒计时器。 可实现6位数的倒计时,通过按键设置初始值,倒计时结束提醒等功能(An inverted timer based on FPGA)
uart
- 实现串口的收发,可以稳定的运行,经过测试,可以完全应用于项目中。(The implementation of the serial port and transceiver, can run stable)
ds1wm FPGA代码
- ds1wm的FPGA代码,包括VHDL和Verilog,带验证
vhdl交通灯
- 实现十字路口两个交通灯的功能,完整实验报告,含源代码(The realization of the intersection of two traffic lights function, complete experimental report, including source code)