资源列表
shuzizhong05
- MAX+plus II 9.23 Baseline-MAX plus Baseline II 9.23
CpldandEepromI2c
- verilog 编写的I2c协议程序，用于cpld读写EEPROM-verilog I2c agreement prepared by the procedures for cpld writable EEPROM
8051inVHDL
- 8051的VHDL IP核，很不错的东西-8051 VHDL IP core, a very good thing
counterdisplay
- VHDL编写的计数和显示程序，对于学习VHDL语言的朋友有一定帮助！-VHDL prepared by the count and display program for learning VHDL friends will definitely help!
8-CPU
- 简单的8位CPU，内含PDF文件.可自己查看详细说明-simple eight CPU, containing PDF files. They can check details
matrix3x3
- 3X3矩阵乘法的VHDL程序实现！对初学者有很大的帮助！-3X3 matrix multiplication VHDL program! For beginners is a great help!
light_telegraphic_code_four_frequency
- 实光电码盘的输出数据的四倍频，使码盘输出精度提高四倍。-real photoelectric encoder output data of the four frequency, accuracy encoder output increased by four times.
sanfenpin
- 这是我自己编写的三分频，也就是奇数分频，占空比为1：1，当然如果需要其它奇数分频，只要将程序里面的N和counter修改即可-This was my third prepared by the frequency, which is odd hours, frequency and duty ratio of 1:1. Of course, if the needs of other odd hours, frequency, as long as the proceedings inside
pwm_higt
- modelsim设计的可调占空比的方波程式-modelsim designed adjustable duty cycle of the square wave program
mc8051_vhdl
- mcs51的vhdl IP核,是每个学习FPGA的必经之路，希望一起探讨-mcs51 the vhdl IP core, each is a must to learn FPGA, hoping to explore together
SPI_verilogHDL
- 本原码是基于Verilog HDL语言编写的，实现了SPI接口设计，可以应用于FPGA,实现SPI协议的接口设计.在MAXII编译成功,用Modelsim SE 6仿真成功.-primitive code is based on Verilog HDL language, and achieving the SPI interface design, FPGA can be used to achieve agreement SPI interface design. MAXII success
8051VHDLyuandaima
- 这是用C语言编写的关于8051的VHDL的源代码-This is the C language on the preparation of the 8051 VHDL source code