资源列表
meng
- for lattice s vhdl -for lattice s vhdl
anti_tr2
- 防抖电路设计,采用计数器内部及时,科以有效防止按键抖动带来的错误操作-camera circuit design, the internal counter using timely, and in the keys to effectively prevent the wrong jitter operation
rd1014
- SDRAM控制器,对SDRAM进行页写和对SDRAM进行页读的快速读写。是一个很好的SDRAM控制器-SDRAM controller, SDRAM to write for pages and pages of SDRAM for fast reading literacy. It is a very good SDRAM Controller
DSP 应用与实例 附TMS320LF2407(EVM) DSK 原理图
- DSP 应用与实例 附TMS320LF2407(EVM) DSK 原理图，谢谢大家！-DSP applications with examples : TMS320LF2407 (EVM) DSK schematics, Thank you!
VHDL例程
- 有关VHDL的大量例程，对学习VHDL编程的人具有很大的帮助，不可不看-lot of routines, to learn VHDL programming of great help, I can not see
(7.27)final_cbb01
- 网络中交换节点的上数据的交换和下行数据分发的硬件实现-network nodes to exchange data on the downlink data exchange and distribution of hardware
8250
- 用VHDL编写的8250，内附波形分析，设计思路，以及具体的程序代码-prepared using VHDL 8250, enclosing waveform analysis, design ideas, as well as specific code
core51_VHDL
- VHDL写的51单片机内核，实现51的全部工能，学习开发FPGA的参考资料。-VHDL wrote 51 microcontroller core, the realization of all the 51 workers may learn FPGA development of reference materials.
4篇Altera中文资料
- 这个是最前沿的技术，对于搞电子的朋友有很大的帮助~-this is the most cutting-edge technologies, engage in electronic friends will be very helpful ~
分频器VHDL描述
- 在数字电路中，常需要对较高频率的时钟进行分频操作，得到较低频率的时钟信号。我们知道，在硬件电路设计中时钟信号时非常重要的。-in digital circuits, the need for regular high frequency clock operating frequency for hours, a lower frequency of the clock signal. We know that the hardware circuit design clock signal i
vhdl程序例子
- vhdl程序源代码，包括Combinational Logic Counters Shift Registers Memory State Machines Registers Systems ADC and DAC Arithmetic等-VHDL source code, including Combinational Logic Counters Shift Registers State Machines Registers Memory S
伪随机序列的说明和源代码
- 可控m序列产生器我分成四个小模块来做，M，M1，M2，M3分别对应为：m序列产生器、控制器、码长选择器、码速率选择器。-controllable m-sequence generator, I divided into four small modules do, M, M1, M2, M3, respectively : m-sequence generator, controller, code-selector, code rate selector.