资源列表
STC12C5A60S2-and-EPROM-
- 基于单片机STC12C5A60S2的内部EPROM测试程序,并将测试结果在LCD1602上显示-EPROM-based microcontroller STC12C5A60S2 internal testing procedures and test results displayed on the LCD1602
encode_8bl0b
- 8b10b的verilog编码程序，已经验证过没有问题，效果比以前的要好-8b10b the verilog coding process has been proven there is no problem, the effect is better than before
state
- 带正负的同频率周期信号的相位差测量机的FPGA实现-With positive and negative periodic signals with frequency phase measuring machine FPGA Implementation
8B10B编码
- 8B10B编码的verilog源代码，已经通过仿真验证
SAA7113forVideo
- FPGA控制SAA7113实现视频解码。SAA7113是高集成度视频解码芯片。-FPGA Control SAA7113 video decoder implementation. SAA7113 is a highly integrated video decoder chip.
Mentorkg_2010
- Modelsim 6.6 破解，Windows & Linux通用-Modelsim 6.6 crack, can be used for Windows/Linux edition.
iir
- 基于verilog HDL的IIR数字滤波器的实现-Verilog HDL-based implementation of the IIR digital filter
pll
- 用VERILOG语言实现的数字锁相环P-VERILOG language with the digital phase-locked loop PLL
YCbCr2RGB
- verilog 实现的YCbCr到RGB得转换-verilog implementation YCbCr to RGB was converted
USB2.0
- usb2.0 fpga程序 用vhdl语言编写 quartus环境实现 -usb2.0 fpga using vhdl language program quartus environment to achieve
ISE_lab19
- 俄罗斯方块VHDL实现，。该设计由下面模块组成：键盘输入模块，游戏控制模块，图像显示模块，文字显示模块，存储单元，复用单元和VGA 控制模块组成。其中图像显示模块和文字显示模块复用VGA 控制模块。游戏控制模块，图像显示模块和文字显示模块通过存储单元交换数据。-Tetris VHDL implementation. The design consists of the following modules: Keyboard input module, the game control modul