资源列表
fpgacrosslightcontroller
- fpga交通控制灯，利用quartus 实现，-FPGA traffic control lights, the use of Quartus achieved
run_watch
- 提供一个数字秒表的EDA设计实例，内故有VHDL源代码，并有运行仿真图。-To provide a digital stopwatch the EDA design example, it is within the VHDL source code, and run the simulation of Fig.
tSinCordic
- 是codic算法实现Sin的浮点C程序，包括定点和浮点程序，已经通过验证.-Sin is codic floating-point algorithm C procedures, including fixed-point and floating-point procedures, has been validated.
xapp336_8b10b
- 8b10b reference design
s3esk_rotary_encoder_interface
- Xilix spartan 3E 旋转编码器接口,脉冲方向识别,AB脉冲滤波 Rotary Encoder Interface Demonstrates how to use the rotary encoder portion of the rotary pushbutton switch.-Xilix spartan 3E rotary encoder interface, pulse direction identification, AB pulse filter Ro
FPGA444555443
- 基于FPGA的全数字锁相环设计,内有设计过程和设计思想-FPGA-based all-digital phase-locked loop design, with the design process and design thinking
a1
- 基于FPGA的B超数据采集功能，根据输入图像的束同步与帧同步信号，采用中断控制进入FIFO的图像数据的读写操作！-FPGA-based B-data collection capabilities, according to the input image beam synchronization and frame synchronization signal used to control access to FIFO interrupt the operation of image dat
key_matrix44
- FPGA EP1C6Q240C8 4*4键盘模块 4*4矩阵键盘，采用扫描方式检测按键-FPGA EP1C6Q240C8 4* 4 keyboard module 4* 4 matrix keyboard, using scanning detection button
clock
- 本实验实现一个能显示小时，分钟，秒的数字时钟（贝一特电子）Verilog源码-The experimental realization of a can show hours, minutes, seconds, digital clock (a special e-bay) Verilog source
altera_maxII_PCI_Verilog
- Altera的MAXIICPLD模拟PCI接口的Verilog代码-Altera
Quartus2_VerilogRoutine
- 该文档是基于QUARTUS2_6.0的Verilog试验例程，其中附有工程源码，对于初学者是最好的例程！它是本人花费一年多自学后写的例程，以便初学者入门，里面附有很多图解，很详细！-The document is based on the Verilog test QUARTUS2_6.0 routines, including an engineering source code, for beginners is the best routine! It is, I spent more