资源列表
generic_ahb_slave
- Generic AHB Slave for all AHB slave transactions
calculator--EDA
- EDA可编程逻辑设计 设计一个简易十进制以内的计算器 可以利用按键和数码管作为计算器的输入和输出，能完成十以内的整数的加、减、乘、除（商和余数）运算，预算结果可以是正/负数，结果的绝对值可以超过十，且能够正确显示。-EDA design of programmable logic to design a simple decimal calculator can be used within the tube as the calculator keys and digital inputs a
risc
- 16位cpu的各功能模块的源程序，经过FPGA仿真通过，希望能帮到你-16-bit cpu' s each functional module of the source, through the FPGA emulation by, hope you can help
cic_hb
- 用FPGA设计的cic和hb滤波器（积分疏状滤波器核半带滤波器）初学FPGA 的同学可以看一下啊-Using the FPGA design cic and hb filter (integral scanty shape filter nuclear half took filter)
IVK_EDK_Demonstrations
- Xilinx IVK EDK 範例程式集-Xilinx IVK EDK Example Programs
Based-on-the-ARM-embedded-system
- 基于ARM的嵌入式系统，涉及到软件设计的启动代码、实时操作系统、链接定位和调试技术.rar-ARM-based embedded system software design involves the startup code, real-time operating system, links to locate and debug technology. Rar
DSP_INTERFACE
- DSP与FPGA时序接口模块，已经经过测试，保证读写稳定-The Interface of DSP to FPGA
DMXLED
- LED DMX控制器程序，多种模式变化效果。-LED DMX controller program, multi-mode variation.
cctan
- 用VHDL实现的贪吃蛇功能，有蛇，墙，蛇可以上下左右地移动-VHDL implementation of the Snake with the function of a snake, the wall, the snake can move up and down
Sine-Wave-inverter-using-8051
- sine wave inverter using 8951 microcontroller
verilogfile
- 四选一MUX 电路。作为寄存器或者其他电路的输入选择控制。也是ASIC 设计中的基本门电路之一。-4-1 MUX, used as register or input controller.
verilogfile
- 现有16 位寄存器。初始值为0。每个时钟周期寄存器的值会左移1位，并且将输入的数据data_in 作为寄存器的最低位，寄存器原来的最高位将被丢弃。要求每个周期实时输出该16 位寄存器对7 求余的余数data_out[3:0]。-16-bit mod-7 divider.