资源列表
frame detect
- 帧同步搜索电路，检查帧同步所在，VHDL程序-frame detect
vhdl
- 键盘去抖，电子密码锁，键盘输入去抖vhdl语言程序-Keyboard debounce
controller-design-of-sdram-
- 基于FPGA对sdram控制器的设计（VERILOG语言）-FPGA-based controller design of sdram (VERILOG language)
DCM
- 详细介绍了基于XILINX公司FPGA时钟管理模块DCM的IP核生成和使用-xilinx ise DCM
FPGA_constraints
- 这是关于FPGA时序约束的文档，属于入门级介绍。在逻辑设计尤其是高速设计时，时序约束是必不可少的！-This is the documentation on the FPGA timing constraints, are entry-level introduction. High-speed logic design, especially in the design, timing constraints is essential!
Each-module-program
- 此程序为基于FPGA乐曲演奏电路设计的VHDL程序，可根据程序手动控制播放的音乐-This program tracks performance FPGA-based VHDL circuit design process, according to the manual control of the music program
FPGA
- 视频压缩技术研究及FPGA实现探讨 视频压缩技术研究及FPGA实现探讨-Video compression technology and its FPGA implementation of video compression technology and its FPGA implementation of
src
- 一种 FFT VERILOG 代码-One kind of FFT VERILOG code
videocap
- 基于FPGA的视频采集源程序，完整代码，以供参考-FPGA-based video capture source, the complete code for reference
correction-of-infrared-image
- 介绍了一种根据红外探测器光谱响应的特点和基于参考源的两点温度非均匀性校正理论, 采用FPGA 器件实现红外成像系统的实时非均匀性两点校正, 并对图像进行了增强。-Introduces a spectral response of infrared detectors based on the characteristics and reference source based on two temperature non-uniformity correction theory, the use
cf_fft_1024_8
- 1024点的fft算法verilog实现程序，主要是通过verilog来实现fft算法- 1024 spot fft algorithm verilog realizes the procedure
Nios_Example_07_SD_35TFT
- 这是一个nios工程，控制TFT液晶屏的程序。FPGA平台用Verilog HDL语言编写的，MCU软核程序有C语言编写。通过这一个完成的工程，你就会明白SOPC的一些实现方法。-This is a nios engineering, control TFT LCD screen program. The FPGA platform Verilog HDL language preparation with the nuclear program has a soft, MCU written