资源列表
ddr
- DDR2内存条在FPGA中的应用,包括内部结构，时序操作和注意事项。-about DDR2 APLLICATION IN FPGA，includ inner instraction timequist and attend.
mfsk
- MFSK的verilog HDL程序，程序简单，易懂-The MFSK The verilog HDL program
exp_8255A
- 8255芯片的verilog语言实现，有完整的仿真波形 顶层文件和引脚绑定-8255 chip verilog language, complete the top level of the simulation waveform file and pin binding
led2
- nios ii 流水灯源程序，采用quartus ii 11.0,nios ii 11.0,qsys构建CPU，由本人亲自编写，并下载至电路板验证流水灯成功-nios ii water lights, quartus ii 11.0 nios ii 11.0 qsys build the CPU, I personally prepared and downloaded to the board verification of light water
NANDFlashcontrolandFIFOcontrol
- 实现NAND Flash块的控制存取以及同步的FIFO的控制 verilog 代码-NAND Flash control access and control of the synchronous FIFO verilog code
Division
- Verilog hdl 除法综合仿真实现，另包含测试文件-Verilog hdl Division
baheyouxiji
- 用vhdl实验板子实现用led灯和按钮实现拔河游戏，通过按键快慢来决定灯的移动顺序，从而获胜-bahe game for led
CPU
- 东南大学COA下实验设计CPU完整程序，可以在RAM中写程序并可观察各个输出的波形，用于检验。-south-east university COA II the design cpu lesson which you can write your own program in the cpu and also can chack the wave
111
- 烟感探测器设计应用笔记,真好，真的很完整的设计应用笔记-Smoke detector design application notes, nice, really complete design application notes
C8051F120-DFT
- c8051f120 fft 样例程序,全部通过测试,可放心使用-c8051f120 fft
baseband_modulation_coef_gain
- CPM调制定点增益模块，完成CPM的调制指数确定-Phase locked loop demodulation module, for CPM modulation demodulation front end
VCO
- 压控振荡器的FPGA实现，Verilog语言完成。编译环境 ISE 13.2-The vco FPGA realizing, Verilog language completed. Compile environment ISE 13.2