资源列表
ram2114
- 本程序是利用ise平台设计出的ram2114的Verilog源代码，通过上机运行检测。-This procedure is to use the platform to design a ram2114 ise of Verilog source code, the test is run through the machine.
FSK_DEMOUDULATION
- 电力线通信跳频技术中的FSK调制，FPGA实现-Powerline Communication FSK modulation frequency hopping technology, FPGA realization
Alrera-FPGA-SOC-Cyclone-V
- Alrera FPGA SOC Cyclone V 官网开发板调试记录-Alrera FPGA SOC Cyclone V official website development board debug log
differentialencoding
- 该程序实现差分编码功能，是个完整的工程，解压完打开工程运行就行，仿真波形文件也在里面，可以直接进行仿真，编写软件是QuatusII9.0版本.-The program implements a differential encoding function, is a complete project, open the project decompression run on the line, also inside the simulation waveform files can be d
BCD_ALU
- bcd码的ALU单元，包含全加、全减、乘法、除法器-bcd code ALU unit, including All-Canadian, all subtraction, multiplication, division, unit
controller_core
- 做SD卡，进行SD卡里内容的读写，读取SD卡里的音频内容，并在FPGA板子上进行播放-Do SD card reader for SD card contents, read SD card audio content, and the FPGA board for playback. . .
PPC_VME-2.0
- 基于PowerPC和FPGA开发的VME控制器的VME接口，采用SOPC建立环境，利用Verilog开发了接口时序。-PowerPC-based and FPGA development VME VME controller interface, using SOPC build environment, the use of Verilog developed interface timing.
my_bayer2rgb
- 摄像头Bayer 转rgb信号 用verilog 编写 在xilinx fpga 软件下 ise 综合 编译-Bayer turn the camera rgb signal in xilinx fpga verilog prepared under ise integrated compiler software
std_ovl_v2p7_Feb2013
- 目前最新的OVL库，里面是标准的ASSERTION模块，支持VHDL刚Verilog，最近在做AXI协议验证的时候用到，分享下-The latest OVL(open verification library),including all standard module of assertions(VHDL and Verilog). It can be used into AXI Protocl Verification. Just share with you guys.
NCO
- 查表法实现NCO数控振荡器，16位频率控制字深度1024，包含ROM表-nco rom
UART
- FPGA实现串口的收发，可以改波特率。Verilog HDL语言-FPGA Verilog HDL
i2c_reg
- 用verilog实现的一个从机的I2C通信模块，测试通过可用，已经在项目用的了！-Using verilog achieve a slave I2C communication module, the test is available, has been used in the project!