资源列表
usbtoiic
- usb转I2C接口的基于verilog的源码以及仿真结果等-usb to I2C Interface based verilog source and simulation results, etc.
LPC-program-CPLD
- 使用quartus开发。该程序通过VHDL语言实现了LPC时序。控制了2个LED数码管，通过读取LPC总线的上BIOS的数据，实现了计算机排故的POST卡功能。-Use quartus development. The program through the VHDL language to achieve a LPC timing. Control of the two LED digital tube, by reading the BIOS on the LPC bus data to a
ug_rsii
- Reed-Solomon II MegaCore Function user guide，altera的RS II编解码的宏功能模块的用户手册，是RS的升级版的IP，但大体使用一样。-Reed-Solomon II MegaCore Function user guide, altera s RS II codec macro function module user manual is an upgraded version of the RS s IP, but generally use
emifa_ram
- FPGA与DSP的EMIF通信，EMIF的RAM这方面相应的程序-FPGA and DSP EMIF communication
jpegencode_latest.tar
- fpga verilog 实现jpeg ip核编码器-fpga verilog forjpeg encode ipcore
FPGA
- verilog编写的QPSK发射机的ＦＰＧＡ部分，已经过验证，完全达到要求。调制矢量误差４％-QPSK transmitter verilog prepared by the FPGA portion, has been proven, fully meet the requirements. Modulation vector error of 4
FPGA(QII)
- 数字信号发生器，FPGA做的仿真程序，包含三角波、锯齿波、正弦波、方波等共六种波形。-FPGA AND alter SIN SAN JIAO BO JUCHIBO FANG BO
wtut_ver.ZIP
- 码表程序，完整的verilog工程文件，完整的工程设计流程，包含时序约束，ip核的嵌入，以及DCM模块的使用-Stopwatch program, complete verilog project file, complete engineering design process, including the timing constraints, ip nuclear embedding, as well as the use of DCM module
18_uart
- FPGA串口通信，可以实现高速通讯，具有良好的模块说明-FPGA serial communication
am
- 基于FPGA的用verilog语言写的，改程序可产生不同调制系数和不同频率的AM波，长按按键切换调制度25 、50 、75 和短按按键切换调制信号频率1k、1.5k、2k、2.5k.-Based on the FPGA using verilog language, change the program can produce different coefficients and different frequency modulated AM wave, long press the butt
DDS_TLC5620
- DDS函数信号发生器 tlc5620 verilog-dds tlc5620 verilog
dividor-design
- 本程序实现了快速除法运算，程序设计简单实用，方便移植-this is a Division