资源列表
FPGA-based_oscilloscope
- FPGA-based_oscilloscope,VHDL写的实现 示波器的程序，及完整的工程描述文档-FPGA-based_oscilloscope. VHDL was oscilloscope to achieve the realization of the process, and complete the project descr iption document
Sobel--Image_Filter_An_Image_filtering_VHDL
- Sobel--Image Filter (I). An Image filtering is made over data loaded into the on board RAM and presented on a VGA monitor.zip-Sobel -- Image Filter (I). An Image filteri Vi is made over the data loaded into RAM on board a nd presented on a VGA monito
Image_Filter_An_Image_halftone
- Image_Filter_An_Image_halftone is performed over data loaded into the on board RAM and presented on a VGA monitor-Image_Filter_An_Image_halftone is perf ormed over data loaded into the on board RAM and p resented on a VGA monitor
Medical_Image_processor
- Medical_Image_processor in VHDL。-Medical_Image_processor in VHDL.
yibuchuanxingtongxinshili
- 异步通信串行口设计实例 做异步串行通信的可以用来参考一下-asynchronous serial communication design examples do asynchronous serial communications can be used to refer to
shuzilvboqideyingjianshixian
- 数字滤波器的硬件实现，里面实例可以直接在quartus中运行-Digital Filter hardware, which can be directly examples run in quartus
weishujituanfashengqishejishili
- 伪随机图案发生器设计实例，也是可以拿来用的，扩频和跳频通信有用-pseudo-random pattern generator design examples, and can be used with the frequency hopping spread spectrum communication and useful
plj32
- 做数字频率计的，满足一般的需要，并有仿真结果-do digital frequency of dollars to meet the general needs, and simulation results
the-design-of-16-bit-cpu
- 用vhdl硬件语言设计的16位cpu，上传的压缩包既包含源代码又包含详细的文档说明。-with vhdl hardware design language of the 16 cpu, Upload compressed contains both the source code also contains a detailed document shows.
very-good-ok-ref-ddr-sdram-verilog
- Sdr SDRAM控制器参考设计,很好的-Sdr SDRAM controller reference design, very good
Song_FPGA
- 这是一个FPGA的实验源码，可以实现对一段音乐的播放。用Verilog语言编写的，对初学者会有一定的帮助。-This is a source of FPGA can be achieved on a music player. Verilog language used, for beginners will be of some help.
adder_Xilinx_Spartan_3
- 这是个基于 Xilinx Spartan3 的加法器，利用Verilog语言编写，对于EDA初学者来说有一定的参考价值。 -This is based on the Xilinx Spartan3 Adder, Verilog language use, EDA newcomer has some reference value.