资源列表
CHENGFAQI
- 本源码是高速并行乘法器的设计源码，开发软件为MAX+PLUS.输入为两个带符号的二进制数-the source is a high-speed parallel multiplier design source, development of software for MAX PLUS. with the importation of two symbols of binary -
20040810319xiyijiVHDL
- 自己 写的课程设计 ，用vhdl写的模拟洗衣机，希望对大家有帮助-himself wrote the curriculum design, simulation vhdl wrote washing machines, we hope to help
fpgacaiji
- 自己课程设计写的程序，用FPGA控制ADC0809的转换时序来完成模/数转换，然后将转换完的数字信号传递给0832-write their own curriculum design process, Connection between ADC 0809 FPGA control the timing to complete the conversion analog / digital conversion, End then converting the digital signal to
!061210[1].pdf
- 基于FPGA的异步FIFO的软硬件实现,通过VERILOG编程实现后下载到FPGA芯片
user_logic_Open_I2C
- iic implementation,用verilog实现了IIC标准协议的功能-iic implementation, verilog achieved using standard protocols IIC function
ft_top
- 用quartus6原理编辑方式写的简易频率计我自己的实验来的 保证能使请您认真查看谢谢 -quartus6 principle used to write the editorial summary Cymometer my own experiments can guarantee you Thank you seriously View
XAPP678c
- xinlinx s vhdl code model and user guider-xinlinx's vhdl code model and the guiding user
cordic2
- cordic算法的vhdl实现，是用来实现极坐标同直角坐标之间变换。-cordic algorithm vhdl realized, is used to achieve a very Cartesian coordinates with the transformation between.
Verilog11
- 这个是用可编程器件进行仿真CPU的程序，大家一起分享拉-this device is programmable CPU simulation procedures to share with everyone Rafah
async_fifo1
- 要不要就看你了 要的话就下把 一切由你来顶 -should not depend on you to the next everything from the top of your to-huh
cpu86model
- 关于8086的软核fpga代码，可以直接再fpag的开发板上调试，好用而且是免费的-on the 8086 soft-core fpga code can then direct the development fpag board debugging, handy and free
987654
- 能够检测各种状态，能很好的实现功能，很有价值！-to detect a variety of conditions, and can achieve good functional and of great value!