资源列表
ad_ctr
- 本人编写的ad9280控制器程序，经过硬件测试通过，欢迎大家下载学习。-I prepared ad9280 controller program, after the hardware test, welcome to download the study.
UART_LED_FND_LCD
- Hi, This Verilog practice code-Hi, This is Verilog practice code
numberword
- 计数器控制程序，希望能够给大家帮助！文件在ＭＡＸ ＰＬＵＳ下开发，调试通过-counter control procedures, we hope to be able to help! MAX PLUS document under development, through debugging
cic_4_dec
- 实现4倍抽取的CIC抽取滤波器模块的Verilog实现，在对数据进行抽取之前，首先进行滤波
PPort
- 计算机并行接口与单片机接口的CPLD烧写文件，是ALTERA芯片的-Computer parallel port interface of the CPLD and MCU programmer document ALTERA chips
da_control
- 这是我在一个电源系统中用的程序,采用VHDL语言实现,用状态机实现-This is my program, used in a power system using VHDL language, using the state machine to achieve
divisor_frecuencia
- its a divider clock. its possible select the frequency based in a master clock
AD1851_test
- 基于FPGA（EP2C5Q208C8N）和串行DAC芯片（AD1851）的正弦波信号发生器。-sin wave generator
FIR_filter
- fir滤波器,FIR_filter design code-FIR_filter design code
vhdl
- 基于vhdl开发的频率发生器-Based on the development of frequency generator vhdl
fsmmoore
- vhdl CODE FOR moore MODEL AND mux
counter
- 一个倒数计时的模块，以秒为单位，可以根据需要修改晶振频率-A countdown of the module, in seconds, you can modify the crystal frequency needed