资源列表
jiaotongdeng
- 简单的交通的源代码，用vhdl程序编写。简单易懂。适合初学者参考。-Simple traffic source code, vhdl programming. Straightforward. Reference for beginners.
push-pull--vhdl
- vhdl 拔河，实现二人游戏-push-pull vhdl
xianshi
- 数字逻辑电路中的显示功能，可以下载到单片机上实现其功能-Digital logic circuits display
ahb_slave
- 主要是用来描述的ahb slave的文件-ahb slave file
rgb1
- 红绿灯交通灯的设计，通过规定时间红绿灯的转变实现交通灯的控制-Traffic light traffic light design, implementation, control traffic lights traffic light changes by a predetermined time
milixingzhuangtaiji
- 米立型状态机的输出变化要提前一个周期，即一旦输入信号或状态发生变化，输出信号立刻发生变化。-M-li-type state machine to advance the output changes in a cycle, that is, once the input signal or status change, the output signal of immediate change.
fifo
- first in first out VHDL code
fifo
- First Input Fisrt Output Register
complexMul
- 复数乘法器，利用ISE里的float IP核，实现了32位复数的乘法-Complex multiplier, using the ISE in the float IP core to achieve the 32 complex multiplications
vme_cs20lw_24a
- VMEbus slave architecture source code Can be implemented on the slave board of a chasis as slave controller-VMEbus slave architecture source code Can be implemented on the slave board of a chasis as slave controller
div8M_v
- 基本的分频器，用于将时钟频率降低一半。包含两个接口，只使用寄存器，未使用线网类型。-The basic divider for halving the clock frequency. Contains two interfaces, using only regs instead of wires.
clock
- 使用xilinx公司的XC95288XL芯片来驱动2个数码管显示24小时时钟制。-Using xilinx s XC95288XL chip to drive two digital display 24-hour clock system.