资源列表
DDS_single
- 基于FPGA的单路DDS函数发生器的实现 ，语言为Verilog-FPGA-based single-channel DDS function generator implementation language for Verilog
ise9.1
- 学习ISE的好资料，想要使用XILINX芯片进行开发必看-ISE learning good information, want to use a must-see XILINX chip development
SDRAM
- 使用VHDL语言编写的对SDRAM进行读写操作控制器及其简单的测试层序。(VHDL language used to read and write operations controller SDRAM and its simple test sequence.)
FPGA_TEST
- FPGA Verilog SPI 按键 LED控制程序-FPGA Verilog SPI 按键 LED控制程序
V3_Verilog
- 这是一个ALTERA的Verilog学习历程，程序可能有点简单，但是对于初学者帮助很大。-This is a learning process Verilog ALTERA, the program may be a bit simple, but very helpful for beginners.
ADF4108_CPLD_finally
- fpga 控制ADF4108射频芯片程序-fpga control ADF4108 RF chip program
Wireless_capture
- 很多仪器都输出同步时钟，这是一个区毛刺的程序。编得很巧妙！-Many instruments are output synchronous clock, which is a district procedure burr. For very clever!
sine-function-generator-by-VHDL
- 1、本实验模拟正弦函数发生器 2、使用逻辑分析仪查看波形 3、/proj/simulation目录中可以在modelsim中仿真-1, this experiment simulated sine function generator 2, the use of logic analyzer to check waveform 3,/proj/simulation directory in the modelsim simulation
zhonghuanAGVpro
- 采用ALTERA FPGA，nios ii内核的AGV控制程序，里面包含了PID算法及相关AGV控制逻辑-Using ALTERA FPGA, nios ii kernel AGV control program, which includes a PID algorithm and control logic associated AGV
S3_WAVE
- 基于FPGA的波形发生器实验，是采用图形输入的方式产生的。-FPGA-based waveform generator experiment is generated by the graphical input.
microblaze-elf-tools-20060213.tar
- FPGA 上的嵌入式系统设计实例，SPARTEN-3E-FPGA, embedded system design example, SPARTEN-3E
Uart_VGA_pic
- Uart_VGA_pic ---基于fpga的图像处理(Uart_VGA_pic --- based on image processing FPGA)