资源列表
sdram_control_burst
- 精简的sdram读写控制器例子，适用于数据采集系统，verilog，只支持burst方式的读写-streamlined read and write SDRAM controller example, applied to the data acquisition system, Verilog. only supports burst mode read and write
32fenpinqi
- 这是用VHDL语言写的32位分频器的程序，可直接运行，看结果，欢迎使用。多指正，交流。-This is written in VHDL 32 dividers procedures can be run directly see the results, welcomed the use. More correct exchange.
fpgasong
- 以verilog HDL 语言编写的一首歌曲，可供初学者借鉴-to Verilog HDL language of a song, draw for beginners
cpldtraffic
- 交通灯信号的ｆｐｇａ实现。通过ｖｅｒｉｌｏｇ语言编程，在ｆｐｇａ上调试通过。-traffic signal lights they simply achieve. Through the Verilog language programming, they simply passed on debugging.
vhdl100
- 这是一个对于初学者很好的vhdl实验的一些例子,希望站长的支持哦-This is a very good for beginners VHDL are some examples of experiments, director of the support oh
VHDLGoldenReferenceGuide
- 一本非常经典的vhdl设计指导手册（英文版）-a very classic VHDL design instruction manual (English version)
hanming_HDL
- 汉明码编解码的两个例程，作为单元模块分别调入所开发系统-codec of two routines, as modules were transferred by the Development System
8bitsine
- 8bit采样sine波形发生器,一共两个文件，各自用VHDL和VERILOG编写，通信开发平台专用-8bit sampling sine wave generator, a total of two papers, each with VHDL and VERILOG preparation, communications development platform dedicated
VHDLBOOK
- 第1章 数字系统硬件设计概述 第2章 VHDL语言程序的基本结构 第3章 VHDL语言的数据类型及运算操作符 第4章 VHDL语言构造体的描述方式 第5章 VHDL语言的主要描述语句 第6章 状态机的设计-Chapter 1 digital system hardware design outlined in Chapter 2 VHDL the basic structure Chapter 3 VHDL data types and operations operator
wom_kg
- 系统时钟的VHDL电路，适合有一定经验的编程人员，希望能对你们有帮助。-VHDL system clock circuit suitable for a certain programming experience, you want to help.
Lab_ISE_Led
- vhdl实例教程，其中的例子适合新手演示使用，肯定会有帮助的。-VHDL example tutorial, an example of the use for novice demo, it will certainly help.
wodevhdl
- vhdl练习实例。在maxplus2中编写，编译通过，正确。-VHDL practice examples. In maxplus2 prepare, compile and correct.