资源列表
led
- 51单片机与FPGA led闪烁程序-51 single-chip FPGA led blinking and procedures. . . . . . . . . . . . .
eepromFINALcorto
- Basically it waits for a interrupt (push button) and checks if an eeprom 24c64 has FF in all its address then turns a led if true, this is only if the switch in port D is closed, if not, it writes a byte number "i" in the adress number "i" and then v
SA_VHDL-
- a simple serial adder in vhdl, enjoy it
matriled
- led显示器应用相当广泛，数码管的应用也很广泛，本设计就led驱动，数码管驱动进行了设计，设计中采用VHDL语言，在FPGA上实现了功能方真，在开发板上实现功能。-led driver， led scan
vhdl
- 实验内容，为存储器 验证存储器的工作原理，需用实验箱-Experiment content, in order to validate memory memory works, need to use test case
8jiafaqi
- 利用此程序可以实现8位超前进位加法器的功能-This program can be used 8-bit look-ahead adder function
crc
- CRC循环冗余检错Cyclic Redundancy Check-Cyclic Redundancy Check
2
- 格雷码转换 计数器的实现 两个程序的实现-Gray code conversion Implementation of counter
mult
- used for multiplexing
dc1
- 40hz sharp with low space and maja -40hz sharp with low space and maja maja
MULTIPLICATER_AND_ADDER
- 本程序描述了实现函数y=ax+b（a和b 都为小于1的8bit小数）的硬件电路描述，最后得到的结果只取了整数部分，为8 bit输出，并且对小数部分四舍五入了。-This procedure describes the implementation function y = ax+b (a and b are less than 1 8bit decimal) descr iption of the hardware circuit, the final result just take the
gen_divd
- FPGA分频器，verilog语言版本，通过实例化参数实现任意整数倍分频-FPGA divider, verilog language version, by instantiating an arbitrary integer multiple parameters Divide