资源列表
led_keyboard
- 用verilog语言实现键盘的移动扫描，这是基于ise实现的。 -Verilog language keyboard with a mobile scanner, which is based on the ise to achieve.
counter
- 一个用数码管自动计数的verilog程序，DE2开发板实现-An automatic digital control procedures verilog count, DE2 development board implementation
cordic
- VHDL写的通用调制解调器的核心程序，通过调试 无错无警告-VHDL generic modem to write the core of the procedure, through no fault debugging without warning
StateMachine-based
- FPGA上的利用状态机实现的分频的verilog程序-verilog source code StateMachine-based for FPGA
UART
- 基于NIOS2的串口初始化设计程序，在应用中只要加上这个初始化就可完成所有的初始化任务-Based on the serial port initialization NIOS2 design process, in applications, coupled with this initialization can be completed as long as all of the initialization task
constituent_encoder
- vhdl code for constituent encoder
vhdl-delay
- vhdl延时程序,源程序，已调试，可以用-VHDL delay program
RAW2RGB
- 数字图像处理，ccd，cmos rawtorgb-raw to rgb
DFF1
- DFF1开发 半加器 超好用的 不信你们试一试呀-DFF1 development of half adder Chaohaoyong do not believe you try ah
clkdiv
- 这是一个FPGA任意分频的很经典的VHDL程序，希望能对大家有帮助-This is an arbitrary frequency FPGA VHDL program of classic, I hope you can help
a_compare_with_b_vm
- 用Verilog描述了一个比较器,输入a和b，当a>b时，输出为a，反之，输出为b-descr iption a comparator by Verilog , the input a and b, when a> b, the output is a, the other hand, the output is b
74LS160jishuqi
- 74ls160十进制可预置计数器VHDL语言代码-74ls160 decimal VHDL language code can be preset counter