资源列表
RS_422
- 在K7FPGA上利用verilog语言编写的RS422串口,由于没找到Verilog所以选择了VHDL(On the K7FPGA, using Verilog language RS422 serial port, because did not find Verilog, so chose VHDL)
i2c
- 使用verilog语言实现iic协议,可实现多字节读写(Implementation of IIC protocol in Verilog language)
LED
- 基于XILINX的3S250E的Verilog关于LED源代码(XILINX based on the 3S250E Verilog on the LED source code)
8位数字显示的简易频率计
- (1)能够测试10HZ~10MHZ的方波信号; (2)电路输入的基准时钟为1HZ,要求测量值以8421BCD码形式输出; (3)系统有复位键; (4)采用分层次分模块的方法,用Verilog HDL进行设计,并对各个模块写出测试代码; (5)具体参照说明文档(包含源代码,仿真图,测试波形,详细的设计说明)(A square wave signal capable of testing 10HZ~10MHZ; (2) the reference clock input by the ci
i2s_rx
- i2s 音频接收模块,接收双声道数据,适用于i2s左对齐模式(I2S audio receiving module)
verilogiic1121
- tvp5150视频解码,平台quartus II(tvp5150 Video decoding,quartus II)
F0501
- 汽车VCU控制器测试工装的程序,STM32单片机扩展总线读写FPGA内部RAM,DDS方式产生PWM,PWM频率,脉宽测量功能(Automotive VCU controller test tooling procedures, STM32 microcontroller expansion bus read and write FPGA, the internal RAM, DDS way to generate PWM, PWM frequency, pulse width measurem
MCPU
- 多周期CPU的verilog代码,用vivado可以仿真出波形(multi-cycle CPU by verilog and using vivado to simulate.)
seg7
- verilog HDL编写的FPGA定时器并用数码管显示(Verilog HDL prepared by the FPGA timer and digital display)
FIFO
- 用verilog语言的实现FIFO存储器,以先进先出的方式处理数据(The FIFO memory is implemented in Verilog language, and data is processed in FIFO)
测pwm波占空比
- 基于Verilog的接受pwm波并且测量pwm波占空比(Measuring the duty cycle of PWM wave)
rtc.tar
- zynq rtc例程 测试好使的,非常好用,可供参考(zynq rtc program,have been verified)