资源列表
aes-128_pipelined_encryption
- AES 加密算法 基于流水线设计 成熟IP core-AES encryption algorithm based on pipeline design mature IP core
OV7670_FPGA_DE2
- 基于Verilog语言的OV7670摄像头驱动，在DE2-115FPGA开发板上实现，显示还有点小问题-Based on Verilog language OV7670 camera driver, the DE2-115 implementation on fpga development board, shows that there are some small problems
uvm-1.1
- 学习IC验证的好资料，包括UVM-1.1a和UVM-1.1d的全部工程example,适合IC验证基于UVM平台的初学者。-Learn good about IC verification, including all engineering of UVM-1.1a and UVM-1.1d, for beginners based on the UVM platform for IC verification.
DSP_XINTF_FPGA
- DSP的XINTF功能和FPGA之间进行异步通信，调试通过，且运行稳定-Carried out between the DSP and the FPGA XINTF asynchronous communication functions, debugging, and stable operation
DDS
- 利用ISE中的ip核产生正弦和余弦波形，包含有test测试文件-ISE ip core cosine sine testbench
DDS_BPSK
- 基于DDS的BPSK调制器设计Verilog源码- U57FA u4E8.08 u868
FPGA 电子相框
- 这是一个基于 de2,搭建的FPGA电子相框，包括硬件和软件，可以实现十张从SD卡读取图片到LCD上显示，非常正规！！
DIATAL_MATLAB_FPGA_AlteraVerilog
- [数字通信同步技术的MATLAB与FPGA实现——AlteraVerilog版]书中资源代码，非常好，分享， 希望大家下下！- U651 u0B3 u09108 u09108 u0103 u0101 u7801 uFF0C u975E u5HR U597D uFF0C u5206 u4EAB uFF0C u5E0C u671B u5927 u5BB6 u4E0B u4E0B uFF01
bpsk
- 基于matlab的bpsk解调仿真，包括误码率的结果比较。- U57Fn
A4_Oscilloscope_Top
- 数字示波器，利用AD、DA和VGA三个外设来实现简易示波器，DA外设发送正弦波给AD外设，AD外设解析成数字信号将数据送给VGA外设进行显示。在VGA上可以看到DA外设发送的波形、波形频率和波形峰峰值。-Digital oscilloscope, the use of AD, DA and VGA three peripherals to achieve a simple oscilloscope, DA peripheral send sine wave to AD peripherals,
bomb-game-in-verilog
- 基于verilog实现的炸弹人小游戏，通过FPGA按钮控制，有VGA模块。-bomb game based on verilog, control through the FPGA button control, also with VGA modules.
pe
- 卷积神经网络当中的卷积模块，包括有测试程序，用硬件实现5*150的整列卷积-Convolutional neural network convolution module, including a test program, with hardware to achieve 5* 150 integer convolution