资源列表
LaSaNewNB_M88E1111_TCP1000mhz
- 用FPGA，基于M88E1111芯片实现的TCP/IP协议的千兆网，将协议封装成IP核(With the FPGA, the TCP/IP protocol based on the M88E1111 chip is used to encapsulate the protocol into IP core)
uart_test_Verilog
- 用verilog实现了uart功能的demo工程。工程使用的IDE为“ISE Design Suite 14.7”，使用时可根据自己硬件，修改引脚配置即可。(The demo project of UART function is realized with Verilog. The IDE used in the project is "ISE Design Suite 14.7", which can be used to modify the pin configura
vhdl编程电子钟
- 实现24小时，可以整点报时的电子钟，使用TEC-8实验台(An electronic clock that can be used for 24 hours, using the TEC-8 test platform)
spi_mem_ctr
- spi接口的memory控制代码，非常简单实用，供参考(The memory control code of spi interface is very simple and practical for reference.)
ECC
- 基于汉明码的ECC纠错算法，可纠错1位，供参考(An ECC error correction algorithm based on hamming code can be used for reference)
2bit_ecc
- 基于BCH码的ECC纠错算法，可纠错2位错误码，供参考(Based on BCH code ECC error correction algorithm, two error codes can be corrected for reference.)
qspi
- qspi接口控制，指令包括spi、dual spi、quad spi，通过验证，供参考(Qspi interface control, including spi, dual spi, quad spi, for reference.)
timer0
- 一个简单的timer，包括定时器，计数器功能模式，非常实用，供参考(A simple timer, including timer, counter function mode, very practical, for reference.)
MT9P031_CONFIG
- 自己做的智能相机,CMOS的配置功能,是经过验证的,可以使用.(The smart camera that you do, the configuration function of CMOS)
v3
- mojo v3 complete eagle schematic
XC6SLX9 Mini Board Documents
- spartan 6 fpga custom board schematic and component list
clock_test
- 采用verilog语言，运行在FPGA上的时钟程序，包括小时、分钟、秒，进行计时(Clock programs, including hours, minutes, seconds)