资源列表
soc_sram_func
- 利用verilog编写的32位 MIPS指令集CPU，sram接口，已上板验证(The 32 bit MIPS instruction set CPU, SRAM interface written by Verilog has been verified on board.)
Bayer2RGB
- Bayer 转RGB Verilog代码实现。。5*5 窗口。在工程中应用的(Bayer to RGB Verilog code implementation. 5*5 window. Applied in Engineering)
WhiteBalance_10bit
- 模块功能：通过白平衡消除由光照带来色差（绿雾） 模块输入：亮度增益输出R,G,B三通道像素值（double） 模块输出：白平衡后R,G,B三通道像素值（double）(Module function: to eliminate chromatic aberration (green fog) caused by illumination through white balance. Module input: brightness gain output R, G, B three c
uart_rx
- Verilog实现的RS232发送和接收程序，有完成的verilog代码，testbench等。(UART send and receive verilog code, including verilog source code, testbench etc.)
基于GMＲ-1系统下行链路的π_4-CQPSK解调方法
- pi4 qpsk的付费论文，讲述FPGA实现的，非常值得学习(Pi4 QPSK's paid papers will be very useful for FPGA.)
VerilogHDL解码DS18B20
- DS18B20解码代码，verilogHDL实现。
Eagle_DataSheet_v1.9 - EG4X20BG256.pdf
- Eagle DataSheet v1.9 - EG4X20BG256
CIC
- 包括地址产生单元、数据查询单元（可以重新初始化rom中的数据，由matlab产生.coe文件替换）、积分单元、抽取单元、梳状滤波单元，对于初学者很有帮助(Including address generation unit, data query unit (data can be re-initialized in rom, generated by matlab. COE file replacement), integration unit, extraction unit, comb fi
Verilog_Single_Cycle_CPU_check
- 用verilog写的一个单周期cpu，用于计组实验(A single cycle CPU written in Verilog for group experiment.)
wallace_multiplier
- 华莱士树乘法器，运用了华莱士树状结构和布斯算法，提高了速度(The Wallace tree multiplier uses the Wallace tree structure and the Buss algorithm to increase speed)
TR4_GPIO1_D8M
- 友晶科技的TR4的开发板，接上D8M摄像头的程序 输出的是MIPI解码后的10位数据 内带signaltap仿真结果和连接图(The development board of TR4, the D8M camera program. The output is the 10 bit data after MIPI decoding. include signaltap simulation results and connection diagrams)
MVB通信架构和流程图
- MVB架构流程图。MVB开发用，大连海天资料(MVB development, Dalian Haitian data)