资源列表
verilog串口收发模块程序
- 基于verilogHDL语言的RS232串口收发模块程序
ft245new
- FPGA与ft245之间的通信，可用FTDI公司自带的labview上位机通信软件进行上位机与FPGA之间通信，已测试过，可用-Communication between the FPGA and ft245 available FTDI comes labview host computer communication software for communication between the host computer and FPGA, has been tested, availabl
C6678-FPGA-source-(very-good)
- TI公司8核DSP C6678开发板fpga源码，很好。-TI DSP C6678 fpga code
pci-express-system-architecture.pdf.tar
- PCI Express is a high performance, general purpose Serial I/O Interconnect defined for a wide variety of future computing and communication platforms. The basic premise of PCI Express is that the host PCI software remains compatible with an e
AD_FIFO
- 简单的Verilog程序，针对音频实验板的AD到DA调通试验，下载执行前请按照自己试验环境更改设置-Simple Verilog program for test the AD to DA loop of universal audio test platform. Please configure it according to the test environment before download and implement the program to FPGA
fpga-fft
- xlinx fpga实现fft功能，利用ip核，包含源程序及完整工程文件，直接就能使用-The fft function xlinx fpga ip-core contains the source code and complete the project file, and can be used directly
eetop.cn_emif_brg
- fpga与DSP通过emif接口通信，fpga内部通过fifo进行数据缓存-fpga with the DSP through emif interface communication, fpga internal data cache by fifo
decoder-8b10b
- 可实现8b10b解码的verilog程序，经过测试-8b10b decoder，verilog
DDC_FPGA
- 基于FPGA的数字下变频器（DDC）的设计,将采样得到的高速率信号变成低速率基带信号，以便进行下一步的信号处理。由NCO、数字混频器、低通滤波器和抽取滤波器四个模块组成。采用自编的加法树乘法器，提高乘法运算效率。-Design based on FPGA digital downconverter (DDC), the high-speed signal will be sampled baseband signal into a low rate for the next step in th
ISCAS85aISCAS89
- Verilig of ISCAS85 and ISCAS89
FPGA-multiplier-on-chip
- 典型实例11.5 FPGA片上硬件乘法器的使用 软件开发环境：ISE 7.1i 硬件开发环境：红色飓风II代－Xilinx版 本实例实现一个IIR滤波器，并在ISE里面进行仿真。 \rtl目录里面是源文件 \project目录里面是工程-Typical examples 11.5 FPGA chip hardware multiplier using the software development environment: ISE 7.1i hardware d
Xilinx_FPGA_FFT_Application_Note
- Xilinx FPGA中FFT IP核的使用笔记，内部有FFT硬核的端口说明和具体设置以及源代码，对于数字信号处理研究人员，能图像处理、雷达成像、实时通信开发人员较多的开发时间！-Xilinx FPGA in the FFT IP core using a laptop internal hard core of the FFT port descr iption and specific settings as well as the source code for digital signa