资源列表
lic_Xilinx_ISE_Vivado
- 这是Xilinx ISE 14.X以及vivado、vivado_hls的license，亲测可用-Xilinx ISE 14.x vivado, vivado_hls license, pro-test available
ad5791
- 在Quartus环境下编写，使用Cyclong系列芯片，配置七通道高精度AD5791，该例子为AD5791的FPGA配置使能代码,包括模拟数据输入模块，复位模块，命令接收是能配置模块。-AD5781，Digital signal convert to Analog signal
ICAP_FPGA_Multiboot
- 在xilinx的ml507板子上用的ICAP功能 配置存储器 这里边包含了控制程序 以及配置ICAP寄存器的程序 就是完整的通过串口控制FPGA多重配置的程序 用verilog实现的-how to configure the ICAP
sync-and-asyn_FIFO_verilog
- 同步与异步FIFO的verilog实现，包括源代码，testbench，测试以及综合通过，还有相关参考资料-Synchronous and asynchronous FIFO verilog achieve, including source code, testbench, test and integrated through, as well as related references
VHDL
- virtex-5 库声明代码 VHDL版本 完整的原语示例代码-virtex-5 library declaration versions of the complete VHDL code sample code primitives
mcbsp_1_14
- DSP的McBsp接口的实现，不过是作为DSP的从机-The realization of McBsp interface of DSP,But the Base is the FPGA as a slaver.
AD_DA_93993
- 这是黑金FPGA开发板关于verilog的例程代码，对于初学者是不错的入门资料-This is the black gold FPGA development board routines about verilog code for beginners is a good introductory information
LDPC-long40rate0.5-encode-and-decode
- LDPC的短码，码长为40速率为0.5的LDPC码的设计，用的是QC矩阵，压缩文件为原码部分，工程太大传不上去。-LDPC short code, a code length of 40 rate of 0.5 LDPC code design, using a QC matrix, the compressed file is part of the original code, do not pass up the works too.
fpga-jpeg
- 包含DCT变换，RGB2YCBCR,JPEG等多个verilog代码及工程-Contains DCT transform, RGB2YCBCR, JPEG and many other verilog code and project
Intel 8237A DMA Controller
- 经典DMA控制器8237A的VHDL设计，对设计DMA控制器有很高的参考价值。-Classic DMA controller 8237A of the VHDL design, the design of the DMA controller has a high reference value.
ad9957-verilog
- 正交调制芯片，.v文件，但是没有说明文件，只能作为参考-Quadrature modulation chip,. V file, but no documentation, only as a reference
rs_204_188----v1.0
- RS 编码和解码Verilog Code, 实现了RS（204,188)的编码和译码；-RS Coding and Decoding Verilog code， implement RS（204,188)