资源列表
div_1p5
- 时钟1.5分频的Verilog代码，简明扼要！-Clock frequency of 1.5 Verilog code, clear and concise!
fileread
- file_read vhdl code provide by my teacher for reading file into FSM-file_read vhdl code
che
- 智能小车寻迹控制程序！！！！何飞飞独家设计！-Smart car tracing control program! ! ! ! He Feifei exclusive design!
blink.c
- Simple AVR Test program. Blinking LED.
Sinusoidal
- sine generator in rom with 512 points.
cic-dicemator
- 该文件包含数字抽取滤波器cic的verilog代码，经测试可用，且简介，消耗硬件资源较少。-This file contains digital sampling filter cic verilog code, after testing is available, and the introduction, less consumption of hardware resources.
mac
- VHDL CODE FOR MAC UNIT
conver
- 非常详细,通俗易懂的并串转换电路得设计,为大家提供思路-very in detail,understandable circuit source
CLA_20
- 用verilog语言编写的CLA_20文件。CLA_20是20位超前进位加法器的源代码，该代码验证后功能正确，读者可以自行编写testbench代码进行验证。-With verilog language CLA 20 files. CLA 20 is 20 lookahead adder source code after the code verification function correctly, readers can write their own testbench code fo
rs232
- RS232总线协议ip，可以实现上位机通信-RS232 bus protocol ip, PC communication can be achieved
Antishakeswitchprocedure
- 这是一个很好的VHDL防抖程序，内有详细讲解，可作为常用的子程序收藏使用-This is a very good anti-shake VHDL procedures, with detailed explanations, can be used as the use of commonly used subroutines Favorites
keyscan
- verilog 写的keyscan代码，转载的，可供大家学习一下！-verilog code written keyscan, reproduced, and for them to learn about! Thanks