资源列表
baseed-on-EDA-of-three-BCD-counter
- 基于EDA的三位BCD计数器，实现从0到999的计数功能-based on EDA of three BCD counter
xapp1198
- Xilinx V7 FPGA如何利用ARM处理器实现GTX/GTH高速串行接口眼图扫描功能。-Xilinx V7 FPGA how to use the ARM processor GTX/GTH-speed serial interface eye scanning.
fir_filter
- 基于d builder的fir滤波器的设计；fpga高级编程-Based dspbuilder of fir filter design fpga Advanced Programming
FFT
- verilog 实现FFT IP核的控制，借鉴给需要学习的朋友-verilog achieve FFT IP core control, reference to the need to learn a friend
systemc-2.2.0
- System C 2.2.0 developers file
break-up
- 利用SOPC控制中断，在QUATUSII,9.0NIOSII9.0环境下开发-Using SOPC control break in QUATUSII, 9.0NIOSII9.0 development environment
ddr2
- 基于xilinx spartan -3A DSP的ddr2控制器-Based on the Xilinx Spartan-3A DSP DDR2 controller
FPGA
- fpga从零开始，很经典的范例，通过FPGA实现一些基本功能！-fpga from scratch, it is the classic example, through the FPGA to achieve some of the basic functions!
Verilog-HDL-Digital-Design
- Verilog HDL 数字设计与综合 夏宇闻-Verilog HDL Digital Design and Xia Wen
Float_add
- 该源码利用Verilog HDL语言成功实现了浮点数的加法运算，包括全部工程以及Verilog 源码，经验证，该程序成功实现了浮点数的加法。-The use of Verilog HDL source language of the successful implementation of floating-point addition operation, including all engineering and Verilog source code, proven, successful
CCSK-FPGA
- 针对CCSK软扩频功能的实现，整理了很多资料，主要有CCSK软扩频原理以及FPGA实现，形成了一个完整的资料包，与大家分享-CCSK AND FPGA
aes
- 此程序完成aes的硬件语言实现部分，通过vhdl语言完成加解密过程。-This process is complete aes hardware language section, vhdl language to complete the encryption and decryption process.