资源列表
ram_ahbif
- 这是一个有关于AMBA_BUS_SLAVE的写法，请各位-This is a amba bus control
led
- verilog 流水灯程序Spartan3E-verilog Light water procedures
vhdl
- 交通灯的控制执行与拐弯基于VHDL语言的交通灯控制器设计-Traffic lights
counter
- 这是一个0~9999的计数器，间隔为1s，希望对初学者有用-this is a counter!0~9999,you can learn this for deep learning~
booth
- booth multiplier in verilog
FIFO
- FIFO在VHDL上的实现。没有注释，较为完善，已通过编译。-FIFO implementations in VHDL. No comment, more perfect, has compiled.
key_read
- 通过延时检测按键的是否按下，同时消除亚稳态-Detected through the delay button is pressed or while eliminating metastable
MUX
- VHDL Code for 4:1,2:1 MUX using when statment
music.v
- 用VHDL硬件描述语言在CPLD实现播放音乐-VHDL hardware descr iption language used for playing music in the CPLD
spi_slave
- SPI的verilog源代码，可以和DSP2812通信，已经试过，可行。-SPI verilog source code
fp_adder
- FP affer 32bit vhdl code from an old project
key
- 实现FPGA 按键控制部分代码，FPGA芯片采用xilinx sptan3e 可以实现按下按键后FPGA通过max232给电脑发送数据-Achieve FPGA button control part of the code, the FPGA chip using xilinx sptan3e can realize after press the button the FPGA through max232 send data to a computer