资源列表
sgmii_latest.tar
- This core implements Physical Coding Sublayer of 1000BaseX transmission (IEEE 802.3 Clause36 and 37). This core can also be used for SGMII interface as this interface leverages 1000BaseX PCS. The differences between the 2 protocols are Link-timer and
3_FirFullSerial
- 基于Quartus II 13.0的FirFullSerial工程设计基本流程，内含详细doc文档-Based on Quartus II 13.0 FirFullSerial basic engineering design process, it contains a detailed doc document
cpu2
- 这是在vivado平台上编写的多功能流水线cpu的实现，是我们课程实验的大作业(This is the implementation of the multi-functional pipelined CPU written on the vivado platform. It's a big job for our course experiment.)
qpskddc
- fpga实现dds和下变频。DDS 技术具有频率切换时间短，频率分辨率高，频率稳定度高，输出信号的频率和相位可以快速切换，输出相位可连续，并且在改变时能够保持相位的连续，很容易实现频率、相位和幅度的数字控制。它在相对带宽、频率转换时间、相位连续性、高分辨率以及集成化等一系列性能指标方面远远超过了传统频率合成技术。因此在现代电子系统及设备的频率源设计中，尤其在通信领域，直接数字频率合成器的应用越来越广泛。-fpga implementation dds and downconversion. DD
2012FPGA
- 这是本人在本科生期间做FPGA课设时的代码-FPGA my undergraduate during class-based code
FFT
- VERILOG CODE FOR FLOATING POINT 8 POINT FFT
delay
- 对输入每一路数据进行配置不同时间的延时，在一个存储池内(delay every input channel)
CycloneIII_EP3C40F780C8_40_RFID
- SOPC,CycloneIII系列芯片EP3C40F780C8，NIOS II IDE,RFID实验代码-SOPC,CycloneIII，EP3C40F780C8，NIOS II IDE, RFID code
or32-uclinux
- OR32arm内核，可进行modelsim仿真并运行UCLINUX操作系统-OR32arm kernel, can be modelsim simulation and run the operating system UCLINUX
RGB_Gray_VGA_Display
- RGB_Gray_VGA_Display --------基于fpga的图像处理(RGB_Gray_VGA_Display - based on image processing FPGA)
vga_nios2
- nios2 vga controller (unsing flash memory)
xl2000user
- 学林电子-学林电子X2000版本，学习板的相关资料-Academia Electronics- Electronic X2000 version of Academia, learning the relevant information sheet