资源列表
2012FPGA
- 这是本人在本科生期间做FPGA课设时的代码-FPGA my undergraduate during class-based code
FFT
- VERILOG CODE FOR FLOATING POINT 8 POINT FFT
delay
- 对输入每一路数据进行配置不同时间的延时，在一个存储池内(delay every input channel)
CycloneIII_EP3C40F780C8_40_RFID
- SOPC,CycloneIII系列芯片EP3C40F780C8，NIOS II IDE,RFID实验代码-SOPC,CycloneIII，EP3C40F780C8，NIOS II IDE, RFID code
or32-uclinux
- OR32arm内核，可进行modelsim仿真并运行UCLINUX操作系统-OR32arm kernel, can be modelsim simulation and run the operating system UCLINUX
RGB_Gray_VGA_Display
- RGB_Gray_VGA_Display --------基于fpga的图像处理(RGB_Gray_VGA_Display - based on image processing FPGA)
vga_nios2
- nios2 vga controller (unsing flash memory)
xl2000user
- 学林电子-学林电子X2000版本，学习板的相关资料-Academia Electronics- Electronic X2000 version of Academia, learning the relevant information sheet
ddr3_mig8
- fpga实现ddr数据收发测试，完整的工程，下载解压后，即可正确运行，已多次验证无误(FPGA DDR data receive and receive test, complete engineering, download and unzip, can run correctly, has been verified many times)
B_PON_OLT_VHDL
- ATM-PON(Passive Optical Network) OLT vdhl proj.file
密码锁
- 程序通过采集输入信息，与FPGA的存储值进行比较，如果密码正确，则开锁电路打开；如果密码错误，锁不打开，并且计数器进行+1操作；累计3次输入密码错误，给警报一个高电平，让其报警。(By collecting input information, the program compares with the storage value of FPGA. If the password is correct, the unlocked circuit opens; if the password is
myproj
- 使用vhdl语言设计波形发生器，产生正弦波，方波，三角波，锯齿波，实现频率，幅度可调。项目包附有设计说明和资料。-Waveform generator using vhdl language design, produce sine, square, triangle, ramp, realize the frequency, amplitude adjustable. Project package with design specifications and data.