资源列表
xilinx_lib.tar
- 用于modelsim仿真的xilinxfpga平台IP库，以ise 13.x为基础制作，在modelsim10下验证通过。(xilinx IP core library for modelsim simulate, based on ise 13.x, verified in modelsim10.)
EDA
- 这是EDA的课件 里面说的是VHDL介绍的很详细 适合初学者-This is the EDA' s courseware inside say is described in great detail VHDL suitable for beginners
memory
- 采用类似堆栈的结构，用于存储歌曲，可实现数据的存储。-Similar stack structure used to store music, data storage can be achieved.
matlab-jiaocheng
- matlab教程，Matlab5.0手册上下-matlab tutorial, Matlab5.0 manual up and down
09_ethernet_100
- Artix7 XC7A100T芯片控制百兆PHY的二层通信，源代码(Two layer communication Artix7 XC7A100T chip control PHY megabytes, source code)
8051
- fpga移植51单片机内核,完全兼容51单片机的开发环境-Fpga u79FB u690D1 u5355 u7247 u673A u5185 u6838, u5B8C u5168 u517C u5BB1 u5355 u7357 u673A u7684 u5F00 u53D1 u73AF u5883
CAVLC
- 关于自己在万方数据库上收集的近五年的CAVLC熵解码器设计的文档，用FPGA/VLSI实现-Articles database on their own in the collection of nearly five years of CAVLC entropy decoder design document, with FPGA/VLSI implementation
SystemC片上系统设计
- SystemC片上系统设计, 大学课本, 仅供学习参考(SystemC system-on-chip design, university textbook, for reference only)
fpga_PWM
- 这是一个Verilogde pwms应用程序，经过仿真。-This is a pwm interface programme-This is a pwm interface programme ! this is very useful !
DES
- 该源码采用DES加密标准，采用Verilog编写，时钟为50M，可以扩展为硬件级加密系统-The source uses DES encryption standard, Verilog prepared, the clock is 50M, can be extended to hardware-level encryption system
Projet_Sahar2
- wdt for watermarking image in vhdl code
Nuedc_altera_FPGA
- 历年全国电子设计大赛代码题目的基于altera FPGA实现，主要VHDL语言描述-NUEDC FPGA VHDL