资源列表
DG408
- FPGA对模拟开关DG408的控制程序，实现不同需求的情况下，模拟通道的转化。-FPGA on the DG408 analog switch control procedures, to achieve the different needs of the circumstances, the conversion of analog channels.
airconditioner
- 中央空调的控制，3级控制系统，这个是中间控制的vhdl源代码-Central air-conditioning control, 3 control system, this is the middle of the control of vhdl source code
CNT4
- 4位二进制加法计数器的两种不同VHDL的描述,与比较。-4-bit binary addition of two different counter VHDL descr iption, and more.
ent_mux
- ethernetmux for 34.5 mbps agregate
Cuantificador
- Cuantificador con 3 bits (Niveles graduables)
adder4
- adder 4 bit use component architecture in VHDL
autosell
- 自动售货机程序，以Verilog三段式描述方法描述有限状态机FSM，编译及输出正常-Vending machine program, describe the method described in Verilog three-finite state machine FSM, compile and output normal
digi_clk
- Digital watch in VHDL.
ASK_modulation_code
- ASK调制VHDL程序，好用，已测试通过-ASK modulation VHDL program, easy to use, has been tested
vga_rgb
- 基于FPGA的实验。编写程序实现VGA彩条显示。像素800x600，刷新频率75Hz，实现8位色的彩条显示-FPGA-based experiment. Programming to achieve color VGA display. Pixel 800x600, refresh rate 75Hz, to achieve 8-bit color display color
matrikeyscan
- 矩阵键盘在工程中应用很广，而且在一些开发板上也会用到矩阵键盘，用FPGA来实现键盘的借口方便简单，本代码就是扫描接口设计源代码-matiry key scan code
jiajianfaqi
- 利用VHDL语言设计的两位加减法器，设计采用BLOCK并行设计可以同时进行加法与减法运算-VHDL language design using addition and subtraction of two instruments used, designed using BLOCK parallel design can be done concurrently addition and subtraction