资源列表
vhdl
- 基于vhdl开发的频率发生器-Based on the development of frequency generator vhdl
fsmmoore
- vhdl CODE FOR moore MODEL AND mux
counter
- 一个倒数计时的模块，以秒为单位，可以根据需要修改晶振频率-A countdown of the module, in seconds, you can modify the crystal frequency needed
buzzer
- 向蜂鸣器发送一定频率的方波可以使蜂鸣器发出相应的音调，该实验通过设计一个状态机和分频 器使蜂鸣器发出"多来咪发梭拉西多"的音调。-A certain frequency to the buzzer to send a square wave can make the appropriate tone buzzer, the experiment by designing a state machine and the divider to make the buzzer " made
key_scan
- FPGA矩阵键盘扫描，是三乘以四规格的。对单片机和FPGA都适用-FPGA matrix keyboard scanning
fifo
- fifo in vhdl file code
eda2234682
- 关于血型配对和电子时钟的VHDL程序，绝对正确，验证了的-Blood type matching and electronic clock on the VHDL program, absolutely correct
triangle
- To generate triangle waveform
Clock
- FPGA入门程序，简单的FPGA驱动数码管显示及计时器程序。-It s very simple,for rookies.
4-2switch
- 四位拨妞开关作为输入，当输入值变化时将其转化成两位输出-The four DIP Niu switch as an input, when the input value changes, be converted into two output
CRC
- CRC 8bit for bus monitor
tb_asy_fifo
- the testbench of asynchronous fifo-test the logic function of asynchronous fifo