资源列表
lxh_xulijianceqi
- 这是1个序列检测器,可以重复检测序列,在通信方面用的较多-This is a sequence detector, can detect repeat sequence, in communications with the more
immediate_divide_module
- 用组合逻辑实现循环除法器。稳定、安全、可靠。-Combinational logic loop divider. Stable, secure, and reliable.
test-bech-of-adder8
- this is a testbench of 8 bit adder
cordic
- vhdl语言编写的cordic算法，实现了cordic的流水线运算。-cordic language vhdl algorithm cordic the pipeline operator.
clock
- 时钟程序 实现钟表功能的VHDL语言编写的程序 -clock
New-folder
- VHDL for Johnson counter
001-P1.0LED
- 单片机流水灯程序，是新手的好帮手，希望能对你有帮助！- Flowing water light microcontroller program, is new good helper, the hope can help you
tb_sigma_h
- test bench for sigma delta
LMS_algorithm_matlab
- 此matlab代码介绍了LMS（leastMeansquare）的算法实现，具有很好的参考价值-LMS algorithm in adaptive algorithm using a very wide range. Reversal of the traditional the offset algorithm that using this algorithm. This matlab code program great reference significance of the adap
minute_ct
- 采用VHDL语言设计的分钟计时器，是时钟设计的一部分，已仿真和测试通过。-Design using VHDL-minute timer, the clock part of the design, simulation and testing has been passed.
MtoNgencount
- Consider a counter that counts from m to n and then wraps around. Derive HDL code for the counter. Use generics, M and N, for m and n of the counter.(Note: there should be one control as UP/DOWN such that when UP/DOWN=1 then counts UP and for 0 it co
exp11
- 在掌握可控脉冲发生器的基础上了解正负脉宽数控调制信号发生的原理。熟练的运用示波器观察实验箱上的探测点波形。掌握时序电路设计的基本思想。-On the basis of mastering the controllable pulse generator, the principle of the digital modulation signal of the positive and negative pulse width is understood. Skilled use of osci