资源列表
alu
- airthmatic & logic unit
clock_design
- 用VHDL实现了一个电子时钟的功能，能同时显示分/秒-VHDL implementation with an electronic clock function, can display minutes/seconds
vga_rgb
- 基于FPGA的实验。编写程序实现VGA彩条显示。像素800x600，刷新频率75Hz，实现8位色的彩条显示-FPGA-based experiment. Programming to achieve color VGA display. Pixel 800x600, refresh rate 75Hz, to achieve 8-bit color display color
matrikeyscan
- 矩阵键盘在工程中应用很广，而且在一些开发板上也会用到矩阵键盘，用FPGA来实现键盘的借口方便简单，本代码就是扫描接口设计源代码-matiry key scan code
jiajianfaqi
- 利用VHDL语言设计的两位加减法器，设计采用BLOCK并行设计可以同时进行加法与减法运算-VHDL language design using addition and subtraction of two instruments used, designed using BLOCK parallel design can be done concurrently addition and subtraction
frehp
- 基于频率抽样方法实现Ⅰ型FIR数字高通滤波器-Based on the frequency sampling method to achieve type Ⅰ FIR digital high-pass filter
clk_divide5
- 五分频电路verilog源码，包含测试文件-Five-frequency circuit verilog source code, including test file
DAC0832_control
- 用verilog HDL编程实现的基于DAC0832的三角波信号，可借鉴编程实现DAC0832芯片控制-Programming with verilog HDL DAC0832-based triangular wave signal, we may learn programming DAC0832 chip control
Cllk20Mto10
- 分频器，将20Hz的时钟信号分频到10Hz-Divider, the clock signal frequency 20Hz to 10Hz
writing
- 关于RAM/ROM的一个写操作的程序，语言为verilog-On RAM/ROM, a write operation procedures, language verilog
GIAIMA38
- Card decode code from 38
adc0809
- ADC0809驱动，VHDL语言描述，开发环境QUARTUS-ADC0809 driver, VHDL language, development environment QUARTUSII