资源列表
FA_8
- Full adder 8 vhdl code
qiduanma
- 用verilog描述的七段码程序，包含测试文件，经过了quartusii仿真测试并成功下载到DE3板子-Described in the seven-segment code with verilog program, including test file, after quartusii simulation testing and successfully downloaded to the board DE3
DAC
- a verilog code about dac of audio codec on fpga board.
vlsiramp
- VHDL RAMP wave gegerator
test01
- 利用状态机编写的流水灯的VHDL程序源代码，基于xilinx公司的spartan3E入门级开发板。-Water prepared by a state machine VHDL source code lights, based on the company s spartan3E xilinx entry-level development board.
sub
- 可实现输入的2个一位十进制数的减运算。要求：输入提供十个数字键，先转化为8421码，再运算，输入的数据和输出结果都要以七段显示译码器显示出来（仿真波形）。输入模块、运算模块、数据转换模块要求用不同的模块分别实现。-Can be one of the input of two decimal reduction operations. Requirements: Enter the ten numeric keys provided, the first transformed into 8,42
lcd1602
- 用LCD1602循环显示，可现实自己向现实的内容！-With LCD1602 cycle, the reality to the reality of their own content!
20frequency-divider
- 20分频器的实现，利用Verilog语言-realize 20 frequence device by Verilog
shift_reg
- 这是一个具有多功能的移位寄存器，长度为8位。具有置位输入端，具备串并转换的功能，并在寄存器满和空时给出提示信号。是专门为SPI模块特意编写的。-This is a versatile shift register, a length of 8 bits. With the input set, with string and conversion functions, and full and empty register signal when prompted.
LCD_Controller
- 学习LCD的控制，如何驱动一个1602LCD显示器。对嵌入式初学者很有帮助。-Learn from the LCD control, how to drive a 1602LCD display. Helpful embedded beginners.
gun
- 一个LED数码管电子钟，涉及计数器，动态扫描-LED digital tube electronic clock, involved in counter, dynamic scanning
3-8
- 3—8译码器,在fpga上实现3,8译码的功能-decoder 3 8