资源列表
AD9851
- 用verilog编写的AD9851的驱动程序-the program use to drive AD9851 which wirte with verilog!
qiduan
- EDA 七段译码器 VHDL代码-EDA Seven-Segment Decoder VHDL code
fullsine
- This a code for sine wave generation in modelsim. The code is written in verilog. An LUT has to be added to this program to work completely.-This is a code for sine wave generation in modelsim. The code is written in verilog. An LUT has to be added t
ad5510
- TLC5510 的状态机控制程序,控制方法简单,并已经测试通过。-TLC5510 control procedures of the state machine, control method is simple and has the test.
new
- four bit shift register verilog code-four bit shift register verilog code
S2_div
- 1、时钟分频,可以观看仿真波形 2、可以添加到硬件逻辑分析仪中观看波形-1, clock frequency divide, you can watch the simulation waveform 2, can be added to the hardware logic analyzer for waveform viewing
crc
- CRC编程源程序,使用Verilog硬件编程语言进行编程-CRC program source code, Verilog hardware programming language used to program
code1
- Line follower code taking input from infrared sensors
selfRst
- 用于产生自复位的信号,有内部校验,可以确保不会误复位,复位时间也可以人为设定。-Used to generate a self-resetting signal, internal calibration, can ensure that no mistake is reset, the reset time can also be man-made.
iir_pipe
- 此程序应用了流水线技术来实现IIR滤波器,它是由一个非递归部分和一个具有延迟为2和系数为9/16的递归部分构成。-The procedure applied to the pipeline techniques to achieve an IIR filter, which consists of a non-recursive portion and having a delay of 2 and a coefficient of the recursive part 9/16 constit
mux
- VHDL CODE FOR MULTIPLEXER IN STRUCTURAL STYLE MODELING
FullAdder
- ful adder code in vhdl which has 3 inputs and 2 outpus