资源列表
dht11
- DTH11温湿度模块的verilog HDL 代码-The verilog HDL code of DTH11
FPGA_phase_lock_demodulation
- FPGA 用Verilog语言实现数字锁相解调系统，包含了正交的DDS函数发生器和相应的AD驱动-FPGA digital demodulation system in Verilog lock, comprising a DDS orthogonal function generator and driving the corresponding AD
fft_ex1
- 基于verilog的FFT设计，使用vivado作为开发平台-Verilog based on the FFT design, the use of vivado as a development platform
apb_spi
- Simple SPI interface realization on Verilog HDL with parameterized FIFO and APB interface
fpga_video_game-master
- 在开发板EGO1上实现的直升机飞行游戏，随时间的累积，速度不断加快，数码管显示积分- Helicopter game in verilog
scan_key_4x4_1602
- 基于xilinx的fpga4x4矩阵键盘输入lcd1602显示矩阵键盘输入代码，模块化设计，程序易移植-Based on xilinx fpga4x4 matrix keyboard input lcd1602 display matrix keyboard input code, modular design, easy to transplant program
axi_master
- DDR3 控制器，axi4_full 模式， burst长度为16，应用于xilinx平台。-DDR3 interface controller， axi4_full working mode with burst length 16, can operate on the xilinx platform.
9363
- AD9363控制接口,在TDD模式下，cmos接口传输数据，数据率61.44MHz，时钟122.88MHz-ad9363 interface.tdd mode.
程序案例LabVIEW上实现虚拟示波器
- 程序案例LabVIEW上实现虚拟示波器位全加器. .............................\3位二进制译码器.vi .............................\4选1数据选择器.vi .............................\RS触发器.vi .............................\RS触发器仿真过程.vi .............................\时钟.vi .................
SRAM芯片(read&write)
- 自己编写的针对SRAM芯片的Verilog读写程序，非常有用(I have written for SRAM chip Verilog read and write procedures, very useful)
AD9777
- 基于FPGA平台设计的AD9777芯片的代码(AD9777 chip design based on FPGA platform code)
is61lv25616 (1)
- verilog测试，fpga测试片外sramis61lv25616，256个k个字，16位，比较难调(it is fpga is 61lv25616 simple verilog program,complete sram read and write.it can read and write .)