资源列表
collect
- 用verilog编写的max197这个AD转换的程序，在ISE综合仿真均通过。-max197, verilog
FA_4
- Full adder 4 vhdl code
conv_enc
- 这是一个用VERILOG HDL编写的卷积码程序-This is a VERILOG HDL with the preparation of procedures for the convolutional codes
crc_16
- 16位的CRC(循环冗余校验码)，CRC是数据通信领域中最常用的一种差错校验码，其特征是信息字段和校验字段的长度可以任意选定。-16-bit CRC (cyclic redundancy check code), CRC is the data communications of the most commonly used error checking code, which is characterized by the information field and check the len
3ADataSending
- Sparten-3A板发送程序，用于发送数据包。-Sparten-3A board data sending
mux4Pchoose8
- 四选一选择器和83编码器，适合新手，基本电路-Four and 83 choose a selector encoder, suitable for novice, basic circuit
asydwncntr
- asynchronuos down/up counter-asynchronuos down/up counter
liushuideng
- 基于fpga的sopc系统实现流水灯的软件代码-The fpga based sopc system software code for light water
The-clock-points-frequency-module
- 对外部晶振50M进行分频，分出1M、1k和1的频率-External crystal oscillator fifty m for crossover, ceding 1 m, 1 k and 1 frequency
PWM
- 产生PWM波，控制直流电机的转速，达到电机控制的效果-Generated PWM wave, DC motor speed control, to achieve the effect of motor control
report1
- 旋钮编码器设计，可实现输出稳定并且具有防抖功能-Rotary encoders designed to achieve stable output and has anti-shake function
vhdl-jishuqi
- 基于quartus 2的4位二进制计数器-Based on quartus 2 of four binary counter