资源列表
sequence_detector(6-state)
- 将《Verilog数字系统设计教程》(夏宇闻)一书中第15章的源代码进行了改进，由原来的8状态精简到6状态，同样可以实现要求的功能，对于重叠出现的特定序列也可以检测到。(The source code of Chapter 15 of the Verilog Digital System Design Tutorial (Xia Yuwen) has been improved from the original 8 state to the 6 state, and the required
Desktop
- I2C,测试代码，经过验证调试与，这个测试代码发现是可用的(I2C, test code, verified debugging and, this test code discovery is available)
prj_ex_1
- 基本工程写法仿真和方法，经过具体的仿真和优化，发现代码完全可用(The method and simulation of the locking device are simulated and optimized, and the code is found to be fully available)
GetDistanceI2c
- arduino激光雷达测距代码,下载相应library后即可使用(Arduino lidar ranging code)
cic10_sec5
- 抽取因子可调，四级梳状滤波器，在数字下变频中会使用到(The decimation factor is adjustable, and the four stage comb filter is used in digital down conversion)
XilinxFree.lic
- 这是许可在Xilinx Vivado 2015利用免费的IP核生成(This is the license to utilize free IP core generation in Xilinx Vivado 2015)
add
- 一个用quartus原理图输入的全加器，(A full adder with quartus schematic input,)
uart
- 实现与电脑端串行数据发送与接收，波特率为9600(Realize serial data sending and receiving with the computer terminal)
FM
- 使用Verilog HDL ，FM调制信号。(Using Verilog, HDL, and FM modulation signals.)
float_2_int.v
- 最全的，最简单，32位浮点数转整数，32位整数转浮点数，直接可以移植，已经测试过好用。(The most complete, the simplest, 32 bit floating-point integer, 32 integer floating point number, can be directly transplanted, has been tested, easy to use.)
multiplier_TB
- multiplier testbench
fulladder_TB
- fulladder test bench