资源列表
priority_data_encoder_vhd.zip
- priority data encoder,priority data encoder
spi
- spi时序控制程序。在fpga中，数据传输等都会由spi进行与主控的交换，此程序用于在数据传输中spi部分的时序控制等。-The spi Timing control procedures. In fpga, data transmission, and will by spi master exchange spi part of this procedure is used in the data transmission timing control.
VerilogSPI_Verilog
- SPI接口程序，verilogHDl 源码，可以直接应用，具有注释说明。-The SPI interface program, verilogHDl source code, can be directly applied, with notes.
AD5322
- DA转换器AD5322的程序源码，FPGA程序，可以直接应用-Program DA converter AD5322 program source code, FPGA, can be applied directly
Adder32Bit
- Adder 32 bit in MIPS microprocessor.
bianma
- 用verilog编写的实现相位选择的DQPSK调制-Written in verilog DQPSK modulation phase selection
ft2232h_rollback
- FT2232H芯片usb循环读写 verilog 实现, 使用时pll可注释掉-FT2232H the chips usb cycle read and write verilog achieve
digital_lock
- 数字密码锁verilog源代码，包括键盘输入，控制模块，和显示模块。-Digital code lock verilog
RAW2RGB
- 图像由RAW向RGB格式转换的verilog源代码实现-Images from the RAW format to RGB conversion Verilog source code implementation
test
- 数字中频正交解调的matlab仿真程序，简单带通信号的正交解调实现-Digital IF quadrature demodulation matlab simulation program, a simple bandpass signal quadrature demodulator to achieve
DPLL_TEST
- 单相数字锁相环 鉴相器 环路滤波器 数控振荡器-Single-phase digital phase-locked loop phase detector loop filter numerically controlled oscillator
STFT
- 短时傅里叶变换的FPGA实现零重复度使用了fft的IP核设计-When the Fourier transform of the FPGA to achieve zero repeatability using fft IP core design