资源列表
ADDER16B
- 16位加法器,用于计算比较大的数据，希望对大家有帮助，多点下载，非常感-sixty bit adder
johnson
- 流水灯程序，可以满足JTAG和AS两种配置方式，已验证-Water light program, you can meet the JTAG and AS two configurations, has been verified
PISO
- It is then register ( shifter) PISO ( Parallel - in, serial - out)-It is then register ( shifter) PISO ( Parallel- in, serial- out)
WM_8776
- WM8776控制模块，直接调用为24位、44.1KHZ采样和输出，开启耳机输出。如需更改可将DA，AD和控制模块分别独立-WM8776 control module, a direct call for the 24-bit, 44.1KHZ sampling and output, open the headphone output. For a change can be DA, AD and control modules separately
Game1
- Game uses LEDS. 2 players participate and push button.
divider
- 基于FPGa的32为除法器，从别的地方搞来的，给大家共享以下，算是做贡献。-Divider based on the FPGA 32, to engage in from somewhere else, to share the following to be considered to contribute to.
TCD
- 基于FPGA的线阵ccd的TCD1501D的verilog驱动。-The verilog drive based on FPGA linear array the ccd' s TCD1501D the.
simple_dual_port_ram_single_clock
- Simple Dual-Port RAM with different read/write addresses but single read/write clock
counter10
- 十进制计数器，比较简单，比较容易，希望大家不要见怪-decimal counter
counter
- Counter for VHDL Project
signaddsub12
- vhdl coding for signed adder substractor
counter
- vhdl code for a simple counter