资源列表
TEXT_TESTING _MOVING
- Banner of a moving characters displaying in tv using vga.
FULL_UART
- UART using FPGA implementation
chuzujifei
- 使用Quartus II 9.0编写的出租车计费系统源码,是课程设计大作业验证通过,可以直接仿真验证(The use of Quartus II 9 written taxis charging system source code, is the course design of large work verification through, can be directly simulated and verified)
华为FPGA设计流程指南
- FPGA设计指南,帮助新手快速上手学习FPGA。为以后项目开发垫下基础。(design guide of FPGA)
AES加密算法密码模块
- 其实现了AES加密中的密码模块,包含了功能的说明,模块以及测试用例,学习上手的难度较小(The realization of the AES encryption password module, contains a descr iption of the function modules and test cases, learning difficult to get started)
cy4ex1
- 特权同学FPGA开发板的verilog项目代码(the verilog code project of Tequan Altera cyclone4 FPGA development board)
RISC_CPU
- 一个基于Verilog的cpu 转载于其他网站(A Verilog based CPU is reloaded on other websites)
XAPP1026 on the Zedboard
- documentation for LwIP implementation in Zedboard
LwIP_socket_apps_sdk
- Vivado sdk socket mode app to implement LwIP
LwIP_raw_apps_sdk
- Vivado sdk raw mode app to implement LwIP
LwIP_hw_platform_0_wrapper_0
- Vivado hardware platform files for sdk to implement LwIP
LwIP_repo
- Vivado repository for base project for LWIP throughput